ST & T UPSD3212C - Manual

1/163 December 2004
uPSD3212A, uPSD3212C
uPSD3212CV
Flash Programmable System Devices with
8032 MCU with USB and Programmable Logic
FEATURES SUMMARY
■ FAST 8-BIT 8032 MCU
–
40MHz at 5.0V, 24MHz at 3.3V
– Core, 12-clocks per instruction
■ DUAL FLASH MEMORIES WITH MEMORY
MANAGEMENT
–
Place either memory into 8032 program
address space or data address space
– READ-while-WRITE operation for In-
Application Programming and EEPROM
emulation
– Single voltage program and erase
– 100K minimum erase cycles, 15-year
retention
■ CLOCK, RESET, AND SUPPLY
MANAGEMENT
–
SRAM is Battery Backup capable
– Normal, Idle, and Power Down Modes
– Power-on and Low Voltage reset
supervisor
– Programmable Watchdog Timer
■ PROGRAMMABLE LOGIC, GENERAL
PURPOSE
–
16 macrocells
– Implements state machines, glue-logic,
and so forth
■ COMMUNICATION INTERFACES
–
I
2
C Master/Slave bus controller
– Two UARTs with independent baud rate
– Six I/O ports with up to 46 I/O pins
– 8032 Address/Data bus available on
TQFP80 package
– 5 PWM outputs, 8-bit resolution
– USB v1.1, low-speed 1.5Mbps, 3
endpoints (uPSD3212A only)
Figure 1. Packages
■ JTAG IN-SYSTEM PROGRAMMING
–
Program the entire device in as little as
10 seconds
■ A/D CONVERTER
–
Four channels, 8-bit resolution, 10µs
■ TIMERS AND INTERRUPTS
–
Three 8032 standard 16-bit timers
– 10 Interrupt sources with two external
interrupt pins
■ Single Supply Voltage
–
4.5 to 5.5V
– 3.0 to 3.6V
TQFP52 (T)
52-lead, Thin,
Quad, Flat
TQFP80 (U)
80-lead, Thin,
Quad, Flat