Philips P89LPC903 - Manual (Page 113)

Philips Semiconductors
P89LPC901/902/903
INDEX
User’s Manual - Preliminary -
2003 Dec 8
113
double buffering in 9-bit mode 69
double buffering in different modes 68
framing error 63, 67
mode 0 65
mode 0 (shift register) 61
mode 1 66
mode 1 (8-bit variable baud rate) 61
mode 2 67
mode 2 (9-bit fixed baud rate) 61
mode 3 67
mode 3 (9-bit variable baud rate) 61
multiprocessor communications 70
SFR locations. 62
status register 65
transmit interrupts with double buffering enabled (modes 1, 2 and 3) 68
W
Watchdog timer 83
feed sequence 84
timer mode 87
watchdog function 83
watchdog timeout values 86
WDCLK = 0 and CPU power down 87