NAD C 542 User Manual
Page 21
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Port P5(8)
8
Port P6(6)
6
Port P7(8)
8
Port P8(8)
RAM
8
Port P9(2)
2
Port P0(8)
A-D converter
(10-bit X 12 channel)
Serial I/O
Serial I/O1(Clock-synchronized)
(256 byte automatic transfer)
Serial I/O2
(Clock-synchronized or UART)
Timers
Timer X(16-bit)
Timer 1(8-bit)
Timer 2(8-bit)
Timer 3(8-bit)
Timer 4(8-bit)
Timer 5(8-bit)
Timer 6(8-bit)
System clock generation
X
IN
-X
OUT
(main-clock)
X
CIN
-X
COUT
(sub-clock)
I/O ports
Build-in peripheral functions
8
Port P1(8)
8
Port P2(8)
8
Port P3(8)
8
Port P4(8)
1
7
ROM
Memory
CPU core
PWM1(8-bit)
PWM0(14-bit)
FLD display function
Buzzer output
Watchdog timer
Interrupt interval
determination function
40 control pins
(36 high-breakdown voltage ports)
65
P5
7
/S
RDY2
/S
CLK22
40
P3
0
/FLD
24
66
P5
6
/S
CLK21
39
P3
1
/FLD
25
67
P5
5
/T
X
D
38
P3
2
/FLD
26
68
P5
4
/R
X
D
37
P3
3
/FLD
27
69
P5
3
/S
CLK12
36
P3
4
/FLD
28
70
P5
2
/S
CLK11
35
P3
5
/FLD
29
71
P5
1
/S
OUT1
34
P3
6
/FLD
30
72
P5
0
/S
IN1
33
P3
7
/FLD
31
73
AV
SS
32
P8
0
/FLD
32
74
V
REF
31
P8
1
/FLD
33
75
P6
t
/S
STB1
/AN
11
30
P8
2
/FLD
34
76
P6
4
/INT
4
/S
BUSY1
/AN
10
29
P8
3
/FLD
35
77
P6
3
/AN
9
28
V
EE
78
P6
2
/S
RDY1
/AN
8
27
P8
4
/FLD
36
79
P7
7
/AN
7
26
P8
5
/RTP
0
/FLD
37
80
P7
6
/AN
6
25
P8
6
/RTP
1
/FLD
38
1
P7
5
/AN
5
64
P2
0
/B
UZ02
/FLD
0
2
P7
4
/AN
4
63
P2
1
/FLD
1
3
P7
3
/AN
3
62
P2
2
/FLD
2
4
P7
2
/AN
2
61
P2
3
/FLD
3
5
P7
1
/AN
1
60
P2
4
/FLD
4
6
P7
0
/AN
0
59
P2
5
/FLD
5
7
P6
1
/CNTR
0
/CNTR
2
58
P2
6
/FLD
6
8
P6
0
/CNTR
1
57
P2
7
/FLD
7
9
P4
7
/INT
2
56
P0
0
/FLD
8
10
RESET
55
P0
1
/FLD
9
11
P9
1
/X
COUT
54
P0
2
/FLD
10
12
P9
0
/X
CIN
53
P0
3
/FLD
11
13
V
SS
52
P0
4
/FLD
12
14
X
IN
51
P0
5
/FLD
13
15
X
OUT
50
P0
6
/FLD
14
16
V
CC
49
P0
7
/FLD
15
17
P4
6
/T
3OUT
48
P1
0
/FLD
16
18
P4
5
/T
1OUT
47
P1
1
/FLD
17
19
P4
4
/PWM
1
46
P1
2
/FLD
18
20
P4
3
/B
UZ01
45
P1
3
/FLD
19
21
P4
2
/INT
3
44
P1
4
/FLD
20
22
P4
1
/INT
1
43
P1
5
/FLD
21
23
P4
0
/INT
0
42
P1
6
/FLD
22
24
P8
7
/PWM
0
/FLD
39
41
P1
7
/FLD
23
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U301: M38B57MC