Renesas REG10J0052-0200 - Manual (Page 15)

Chapter 5.Headers
5.1.Application Headers
This information is supplied for reference. Only pins marked are connected on this board.
These connections are not level translated.
Table 5-1 and below Table 5-2 show the standard application header connections.
JA1
Pin Generic Header Name CPU board
Signal Name
Pin Header Name CPU board
Signal Name
1 Regulated Supply 1 5V 2 Regulated Supply 1 GROUND
3 Regulated Supply 2 3V3 4 Regulated Supply 2 GROUND
5 Analogue Supply AVcc 6 Analogue Supply AVss
7 Analogue Reference AVref 8 ADTRG ADTRG
9 ADC0 I0 AD0 10 ADC1 I1 AD1
11
ADC2 I2
AD2 12 ADC3 I3 AD3
13 DAC0 DAC0 14 DAC1 DAC1
15 IOPort IO_0 16 IOPort IO_1
17
IOPort
IO_2 18 IOPort IO_3
19 IOPort IO_4 20 IOPort IO_5
21 IOPort IO_6 22 IOPort IO_7
23 Open drain IRQAEC IRQ3 24 I²C Bus - (3rd pin) IIC_EX
25 I²C Bus IIC_SDA 26 I²C Bus IIC_SCL
Table 5-1: JA1 Standard Generic Header
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