Ricoh R5C841 - Manual (Page 36)

R5C841 PCI-CardBus/IEEE 1394/SD Card/Memory Stick/xD/ExpressCard Data Sheet
12345  2004 R EV .1.10 4-11
On the software suspend mode, the interface signals on the PC Card keep to the following levels
when the card is inserted.
CardBus : CCLK=low, CPAR=low, CAD=high or low, CCBE#=high or low, CRST#=low,
CGNT#=high, Pull-up=high, Pull-down=low
16-bit : CDATA=hi-z, CADR=low
Other pins keep the level before the software suspend mode.
In addition to the Operating system-directed power management like ACPI, the R5C841 can
control to stop or slow the clock by supporting CLKRUN# and CCLKRUN# protocol. Therefore, it
is possible to reduce the power consumption. The state of the card interface signals is the same
as the software suspend mode. The hardware suspend mode is enabled when HWSPND# is
asserted. Once HWSPND# is asserted, all PCI bus interface signals are disabled and
VCC_PCI3V can be powered off. If PCIRST# is asserted, the internal registers of the R5C841
hold the data as long as VCC_RIN, VCC_ROUT*, VCC_3V and VCC_MD3V are on.
(*: in case of an internal regulator disabled)
4.11.2 Function on 1394 OHCI-LINK
D0 Fully function of OHCI device state. Unmasked interrupts generate INTx#. And also,
PME# can be generated by PME_EN after setting PME_STS.
D1 Ack_tardy is returned on accesses from the 1394. The PCI configuration space, the 1394
OHCI register and the GUID register are preserved. Functional interrupts are masked.
Unmasked interrupts can be generated by PME_EN after setting PME_STS. All transmit
contexts must be inactive before it attempts to place the R5C841 into the D1 power state.
IEEE1394 bus manager shall not be placed into D1. Placing the R5C841 into D1 enables
the ack_tardy generation. Software must ensure that IntEve.ack_tardy is 0b and should
unmask wake-up interrupt events such as IntEvent.phy and IntEvent.ack_tardy before
placing the R5C841 into D1.
D2 LPS is deasserted and stopping supply of SCLK is requested to the PHY. The PCI
configuration space is retained and capable of access. The GUID register is retained, but
the1394 OHCI register is lost. Functional interrupts are masked. But when the LinkOn
signal that is occurred by accepting LinkOn packet or PHY.INTERRUPT is accepted from
the PHY, PME# is generated by PME_EN after setting PME_STS.
D3hot LPS is deasserted and stopping SCLK supply is requested to the PHY. The PCI
configuration Space is capable of access, but all register except the PME context is lost.
The GUID register is retained, but the1394 OHCI register is lost. On transitioning back to
D0, the internal reset is automatically done even if PCIRST# is not asserted. Functional
interrupts are masked. But when the LinkOn signal is accepted from the PHY, PME# is
generated by PME_EN after setting PME_STS.
D3cold D3cold indicates the state that VCC_RIN, VCC_ROUT*, VCC_3V, VCC_MD3V and
AVCC_PHY3V are changed to the auxiliary power on D3hot state. D3cold supports
functions like D3hot’s.
( *: in case of an internal regulator disabled)