Renesas HD74AC182 - Manual (Page 2)

HD74AC182
Rev.2.00, Jul.16.2004, page 2 of 6
Logic Symbol
C n
G
P
P 0
C n+x C n+y C n+z
G 0 P 1 G 1 P 2 G 2 P 3 G 3
Pin Names
Cn Carry Input
G
0
,
G
2
Carry Generate Inputs (Active Low)
G
1
Carry Generate Input (Active Low)
G
3
Carry Generate Input (Active Low)
P
0
,
P
1
Carry Propagate Inputs (Active Low)
P
2
Carry Propagate Input (Active Low)
P
3
Carry Propagate Input (Active Low)
C
n + x
to C
n + z
Carry Outputs
G
Carry Generate Output (Active Low)
P
Carry Propagate Output (Active Low)
Logic Diagram
C n
C n+x C n+y C n+z
G 0 P 0 G 1
G P
P 1 G 2 P 2 G 3 P 3
Please note that this diagram is provided only for the understanding of logic operations and should not be
used to estimate propagation delays.
Functional Description
The HD74AC182/HD74ACT182 carry lookahead generator accepts up to four pairs of Active Low Carry Propagate (
P
0
to
P
3
) and Carry Generate (
G
0
to
G
3
) signals and an Active High Carry input (Cn) and provides anticipated Active High
carries (C
n + x
, C
n + y
, C
n + z
) across four groups of binary adders. The HD74AC182/HD74ACT182 also has Active Low
Carry Propagate (
P) and Carry Generate (G) outputs which may be used for further level of lookahead. The logic
equations provided at the outputs are: