Texas Instruments TPA3200D1 - Manual (Page 7)

www.ti.com
TPA3200D1
SLOS442A – MAY 2005 – REVISED JULY 2005
Terminal Functions
TERMINAL
I/O DESCRIPTION
NO. NAME
1 BCK I Bit clock input for audio data
3 DATA I Audio data input
4 LRCK I Left and right channel audio data latch enable input
Select left-channel or right-channel data
7 LR_SEL I HIGH: Left channel active
LOW: Right channel active
11 GAIN0 I Gain select least significant bit. TTL logic levels with compliance to 5 V.
12 GAIN1 I Gain select most significant bit. TTL logic levels with compliance to 5 V.
Shutdown signal for IC (low = shutdown, high = operational).
13 SHUTDOWN I
TTL logic levels with compliance to 18 V.
5, 9, 38, 40 DGND - Digital ground
6, 8 VDD - Digital power supply (4.5 V – 5.5 V)
15 VCLAMP - Internally generated voltage supply for bootstrap capacitor
17 BSN I/O Bootstrap I/O, negative high-side FET
28 BSP I/O Bootstrap I/O, positive high-side FET
2, 16 NC - No internal connection
31 ROSC I/O I/O for current setting resistor for ramp generator
32 COSC I/O I/O for charge/discharging currents onto capacitor for ramp generator creation
33 BYPASS O Midrail analog reference voltage
34 VREF O Analog 5-V regulated output. Not to be used for powering external circuitry.
35 VCC - High-voltage analog power supply (8 V to 18 V).
19, 20 OUTN O Class-D 1/2-H-bridge negative output
Zero flag output
HIGH: No input present
39 ZERO O
LOW: Data present at input
This can be used to shutdown the device when no data is present at input.
De-emphasis control.
41 DEMP I HIGH: 44.1 kHz De-emphasis ON
LOW: 44.1 kHz De-emphasis OFF
Soft mute control
42 MUTE I HIGH: Mute ON
LOW: Mute OFF
Audio data format select
43 FORMAT I HIGH: 16-bit right justified
LOW: 16- to 24-bit, I
2 S format
44 SCLK I System clock input
18, 27 PVCC - Power supply for H-bridge (8 V to 18 V)
25, 26 OUTP O Class-D 1/2-H-bridge positive output
29, 30 AGND - Analog ground
14, 21, 22, 23, 24 PGND - Power ground for H-bridge
10 VCOM - Midrail digital reference voltage
36 FLT2 I/O
Noise-filter terminals. Connect capacitor across pins 36 and 37
37 FLT1 I/O
Connect to AGND and PGND - should be the center point for both grounds.
Thermal Pad
Internal esistive connection to AGND.
7