38 mul multiply (rounded) – Texas Instruments MSP50C6xx User Manual
Page 219
Individual Instruction Descriptions
4-133
Assembly Language Instructions
4.14.38
MUL
Multiply (Rounded)
Syntax
[label]
name
src [, mod]
Clock, clk
Word, w
With RPT, clk
Class
MUL
An[~] [, next A]
1
1
n
R
+3
3
MUL
{adrs}
Table 4–46
Table 4–46
5
Execution
[premodify AP if mod specified]
PH,PL
⇐
MR * src
PC
⇐
PC + w
Flags Affected
src is An :
OF, SF, ZF, CF are set accordingly
src is {adrs}:
TAG bit is set accordingly
Opcode
Instructions
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
MUL An[~] [, next A]
1
1
1
0
0
next A
An
1
1
1
1
0
0
A~
0
MUL {adrs}
1
1
0
1
1
1
0
1
1
adrs
x
dma16 (for direct) or offset16 (long relative) [see section 4.13]
Description
Multiply MR and src. The 16 MSBs of the 32–bit product are stored in the the
PH register. The contents of the accumulator are not changed. The upper 16
bits of the result are rounded for MUL An, but not for MUL {adrs}. Pre–modify
the accumulator pointer if specified.
Syntax
Description
MUL An[~] [, next A]
Multiply MR by An[~] word, store result in An[~]
†
MUL {adrs}
Multiply MR by data memory word
‡
† Round upper 16 bits
‡ No status change
See Also
MULR, MULAPL, MULSPL, MULSPLS, MULTPL, MULTPLS, MULAPL
Example 4.14.38.1
MUL A0~, ––A
Predecrement accumulator pointer AP0. Multiply MR with accumulator A0~ and store upper 16 bits of
the result (rounded) PH. Accumulator A0~ is left unchanged.
Example 4.14.38.2
MUL *R3––
Multiply MR with the value pointed at by R3 and store the upper 16 bits of the result (rounded) into PH.
Decrement R3 by 2.