Vertex Standard Yaesu VX-2R - Manual (Page 9)

9
(4) 435-MHz-Band Transmission
Modulating audio passes through deviation setting D/A
converter Q1010 (M62364FP) then delivered to the UHF
modulator of the VCO-UNIT mounted on the MAIN-
UNIT. This signal is applied to varactor D4002 (HSC277)
in the tank circuit of UHF VCO Q4002 (EC3H07B), which
oscillates at the desired UHF transmitting frequency. The
modulated VCO signal is buffered by amplifier Q4006
(EC3H07B) and Q1024 (2SC5374) and delivered through
UHF T/R diode switch D1040 (HN2D01FU) to the MAIN-
UNIT. The modulated low-level UHF transmit signal from
the VCO is passed through diode switch D1047
(DAN222M) to amplifier Q3004 (2SC5374) on the SW-
UNIT. The amplified UHF transmit signal from Q3004
(2SC5374) is amplified by Q3001 (2SC5226) and RF pow-
er amplifier Q3002 (2SK3079) on the SW-UNIT up to 0.1,
0.3, 1.0, or 2 Watts (depending on the power source). The
RF output passes through TX diode switch D1057
(RLS135) then fed via the T/R switch and low-pass filter
to the antenna terminal.
PLL Frequency Synthesizer
PLL IC Q1034 (MB15A01PFV) on the MAIN-UNIT con-
sists of a data shift register, reference frequency divider,
phase comparator, charge pump, intermittent operation
circuit, and band selector switch. Serial PLL data from the
CPU is converted into parallel data by the shift register in
the PLL IC Q1034 (MB15A01PFV) and is latched into the
comparative frequency divider and reference frequency
divider to set a frequency dividing ratio for each. An 11.7-
MHz reference signal produced by X1001 is fed to REF
pin 1 of the PLL IC Q1034 (MB15A01PFV). The internal
reference frequency divider divides the 11.7-MHz refer-
ence by 2,050 (or 1,640) to obtain a reference frequency of
5 kHz (or 6.25 kHz), which is applied to the phase com-
parator. Meanwhile, a sample of the output of VHF VCO
Q4004 or UHF VCO Q4002 (both EC3H07B) on the VCO-
UNIT, buffered by Q4007 (DTC144ZE), is fed to the PLL
IC, where the frequency is divided by the internal com-
parative frequency divider to produce a comparison fre-
quency which also is applied to the phase comparator.
The phase comparator compares the phase between the
reference frequency and comparison frequency to output
a pulse corresponding to the phase difference between
them. This pulse is fed to the charge pump, and the out-
put from the charge pump passes through a loop filter
composed of L1036, R1152, C1166, and either R1153,
C1167, R1172 and C1193, for VHF, or R1149, C1162, R1171,
and C1192 for UHF, which converts the pulse into a cor-
responding smoothed varactor control voltage (VCV). The
VCV is applied to varactor D4004 and D4013 (both
1SV325
) in the VHF VCO tank circuit, or to varactor D4001
(HVC355B) in the UHF VCO tank circuit, to eliminate
phase difference between the reference frequency and
comparative frequency, thus locking the VCO oscillation
frequency to the reference crystal. The VCO frequency is
determined by the frequency-dividing ratio sent from the
CPU to the PLL IC. During receiver power save opera-
tion, the PLL circuit operates intermittently to reduce cur-
rent consumption, for which the intermittent operation
control circuit reduces the lock-up time.
Circuit Description