C&H Technology VSKT320PbF Series - Manual (Page 3)

VSKT320PbF Series
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Vishay Semiconductors
Revision: 05-Jul-12 2 Document Number: 94085
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ON-STATE CONDUCTION
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum average on-state current

at case temperature
I
T(AV)
180° conduction, half sine wave
320 A
70 °C
Maximum RMS on-state current I
T(RMS)
As AC switch 710
A Maximum peak, one-cycle on-state 
non-repetitive, surge current
I
TSM
t = 10 ms No voltage

reapplied
Sinusoidal 
half wave, 
initial T
J
= 
T
J
maximum
9000
t = 8.3 ms 9420
t = 10 ms 100 % V
RRM

reapplied
7570
t = 8.3 ms 7920
Maximum I 2 t for fusing I 2 t
t = 10 ms No voltage 
reapplied
405
kA 2 s
t = 8.3 ms 370
t = 10 ms 100 % V
RRM

reapplied
287
t = 8.3 ms 262
Maximum I 2 t for fusing I 2 t t = 0.1 ms to 10 ms, no voltage reapplied 4050 kA 2 s
Low level value or threshold voltage V
T(TO)1
(16.7 % x  x I
T(AV)
< I <  x I
T(AV)
), 
T
J
= T
J
maximum
0.80
V
High level value of threshold voltage V
T(TO)2
(I >
 x I
T(AV)
< I <
 x I
T(AV)
), T
J
= T
J
maximum 1.03
Low level value on-state slope resistance r
t1
(16.7 % x
 x I
T(AV)
< I <
 x I
T(AV)
),

T
J
= T
J
maximum
0.75
m

High level value on-state slope
resistance
r
t2
(I >
 x I
T(AV)
< I <
 x I
T(AV)
), T
J
= T
J
maximum 0.53
Maximum peak on-state or 
forward voltage drop
V
TM
, V
FM
I
TM
= 750 A, T
J
= T
J
maximum, 180° conduction, 
average power = V
T(TO)
x I
T(AV)
+ r
f
x (I
T(RMS)
) 2
1.37
V
I
TM
= 750 A, T
J
= 25 °C, 180° conduction,

average power = V
T(TO)
x I
T(AV)
+ r
t
x (I
T(RMS)
) 2
1.40
Maximum holding current I
H
Anode supply = 12 V, initial I
T
= 30 A, T
J
= 25 °C 500
mA
Maximum latching current I
L
Anode supply = 12 V, resistive load = 1
,
gate pulse: 10 V, 100 μs, T
J
= 25 °C
1000
SWITCHING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Typical delay time t
d T
J
= 25 °C, gate current = 1 A dI
g
/dt = 1 A/μs

V
d
= 0.67 % V
DRM
1.0
μs
Typical rise time t
r
2.0
Typical turn-off time range t
q
I
TM
= 300 A; dI/dt = 15 A/μs; T
J
= T
J
maximum; 
V
R
= 50 V; dV/dt = 20 V/μs; gate 0 V, 100 
200 to 350
BLOCKING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum peak reverse and

off-state leakage current
I
RRM,
I
DRM
T
J
= T
J
maximum 50 mA
RMS insulation voltage V
INS
50 Hz, circuit to base, all terminals shorted, 25 °C, 1 s 3600 V
Critical rate of rise of off-state voltage dV/dt T
J
= T
J
maximum, exponential to 67 % rated V
DRM
1000 V/μs