Rainbow Electronics ADC12038 - Manual (Page 21)

Timing Diagrams
(Continued)
ADC12038 Hardware Power Up Down
TL H 11354 – 32
Note Hardware power up down may occur at any time If PD is high while a conversion is in progress that conversion will be corrupted and erroneous data will be
stored in the output shift register
ADC12038 Configuration Modification Example of a Status Read
TL H 11354 – 33
Note In order for all 9 bits of Status Information to be accessible the last conversion programmed before Cycle N needs to have a resolution of 8 bits plus sign 12
bits 12 bits plus sign or greater
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