Rainbow Electronics MAX6662 - Manual (Page 6)

MAX6662
12-Bit + Sign Temperature Sensor with
SPI-Compatible Serial Interface
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Temperature Fault Queue
The activation of ALERT and OT is subject to the depth
of the fault queue. If the Fault Queue bit in the
Configuration register is enabled,
ALERT or OT does
not assert until four consecutive temperature conver-
sions are at fault.
For example: If T HIGH is set to 100°C, T HYST is set to
20°C,
ALERT is set to interrupt mode, and fault queue
is enabled, ALERT does not assert until four consecu-
tive conversions exceed 100°C. If the temperature is
then read through the serial interface,
ALERT
deasserts. ALERT asserts again when four consecutive
conversions are less than 80°C.
Shutdown Mode
The MAX6662 features a programmable shutdown
mode. Set the Shutdown bit in the Configuration register
to 1 to shut down. In the shutdown mode, everything is
disabled except the power-on reset (POR) and the seri-
al interface. In the shutdown mode, information stored
in all registers is retained. The Temperature register
retains the temperature from the last conversion result.
Serial Interface Protocol
The serial interface consists of three signal lines: chip
select (
CS), bidirectional data line (SIO), and serial
clock (SCLK). Only the master (external) drives CS and
SCLK. Both the master and the MAX6662 drive SIO.
When
CS is high, the MAX6662 does not respond to any
activity on clock and data lines. When CS goes low, a
transaction begins. A valid transaction has 24 clock
cycles provided from SCLK after
CS goes low—no more
and no fewer. Any communication with more or fewer
than exactly 24 clocks is ignored. Data is clocked in to
the MAX6662 at the rising edge of SCLK when the mas-
ter is writing. Data is clocked out at the falling edge of
SCLK when the master is reading. Both the command
byte and data word are clocked in (or out) with the
most-significant bit (MSB) bit first. The first eight clock
cycles are dedicated to the command byte (1 bit per
cycle). This command byte is input to the MAX6662
through the SIO. Sixteen cycles of data follow. The 16
cycles of data are either driven by the master or by the
MAX6662, depending on the command byte. If the
MAX6662 is driving the SIO, it starts driving at the
falling edge of the eighth clock up until the rising edge
of
CS. Data is available on the falling edge of the eighth
clock cycle. Figure 3 depicts a valid serial interface
transaction and Figure 4 is the serial interface timing
diagram.
1 2 3 4 5 6 7 8 9 10 23 24
DATA WORD (16 BITS)
CS
SCLK
SIO COMMAND BYTE (8 BITS)
Figure 3. MAX6662 Serial Interface Operation
t CSS
t CSH
t CSW
t CH t CL t TR
t DS
t DO
t F
CS
SCLK
SIO
t DH
Figure 4. Detailed Serial Interface Timing Diagram
BIT POR DESCRIPTION
15 to 13 0 Reserved. Writing to these bits is ignored.
12 0 Fault Queue bit. Set to 1 to enable queue.
11 0 ALERT polarity bit. Set to 1 for active-high ALERT output. Default is 0 for the ALERT output active-low.
10 0 OT polarity bit. Set to 1 for active-high OT output. Default is 0 for the OT output active-low.
9 0 Interrupt Mode bit. Set to 1 to enable the interrupt mode. Default is 0 for the comparator mode.
8 0 Shutdown bit. Set to 1 to shut down the MAX6662.
7 to 0 0 Reserved. Writing to these bits is ignored.
Table 1. Bit Descriptions of the Configuration Register