Rainbow Electronics MAX15023 User Manual

Page 22

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MAX15023

Wide 4.5V to 28V Input, Dual-Output
Synchronous Buck Controller

22

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4) Place the second zero (f

Z2

) at 0.2 x f

O

or at f

PO

,

whichever is lower and calculate R

1

using the fol-

lowing equation:

5) Place the third pole (f

P3

) at half the switching fre-

quency and calculate C

CF

:

6) Calculate R

2

as:

MOSFET Selection

The MAX15023’s step-down controller drives two exter-
nal logic-level n-channel MOSFETs as the circuit switch
elements. The key selection parameters to choose
these MOSFETs include:

• On-resistance (R

DS(ON)

)

• Maximum drain-to-source voltage (V

DS(MAX)

)

• Minimum threshold voltage (V

TH(MIN)

)

• Total gate charge (Qg)

• Reverse transfer capacitance (C

RSS

)

• Power dissipation

All four n-channel MOSFETs must be a logic-level type
with guaranteed on-resistance specifications at V

GS

=

4.5V. For maximum efficiency, choose a high-side
MOSFET (NH_) that has conduction losses equal to the
switching losses at the typical input voltage. Ensure
that the conduction losses at minimum input voltage do
not exceed MOSFET package thermal limits, or violate
the overall thermal budget. Also, ensure that the con-
duction losses plus switching losses at the maximum
input voltage do not exceed package ratings or violate
the overall thermal budget. Ensure that the MAX15023
DL_ gate drivers can drive a low-side MOSFET (NL_).
In particular, check that the dV/dt caused by NH_ turn-
ing on does not pull up the NL_ gate through NL_’s
drain-to-gate capacitance. This is the most frequent
cause of cross-conduction problems.

Gate-charge losses are dissipated by the driver and do
not heat the MOSFET. Therefore, if the drive current is
taken from the internal LDO regulator, the power dissi-
pation due to drive losses must be checked. All
MOSFETs must be selected so that their total gate
charge is low enough; therefore, V

CC

can power all four

drivers without overheating the IC:

where Q

G_TOTAL

is the sum of the gate charges of all

four MOSFETs.

Power Dissipation

Device’s maximum power dissipation depends on the
thermal resistance from the die to the ambient environ-
ment and the ambient temperature. The thermal resis-
tance depends on the device package, PCB copper
area, other thermal mass, and airflow.

The power dissipated into the package (P

T

) depends on

the supply configuration (see the

Typical Application

Circuits

). It can be calculated using the following equation:

P

T

= V

IN

x I

IN

For the circuits of Figures 7 and 8:

P

T

= V

CC

x (I

IN

+ I

VCC

)

where V

IN

and V

CC

are the voltages at the respective

pins, I

IN

is the current at the input of the internal LDO

(I

IN

is practically zero for the circuits of Figures 7 and

8), I

VCC

is the current consumed by the internal core

and drivers when the internal regulator is unused for 5V
supply operation (IN = V

CC

). See the corresponding

Typical Operating Characteristics

for the typical curves

of I

IN

and I

VCC

current consumption vs. operating fre-

quency at various load capacitance values.

P

V

Q

f

DRIVE

IN

G TOTAL

SW

=

Ч

Ч

_

R

V

V

V

R

FB

OUT

FB

2

1

=

×

C

C

f

R

C

CF

F

SW

F

F

=

Ч

Ч

Ч

Ч

(

)

2

0 5

1

π

.

R

f

C

R

Z

I

I

1

2

1

2

=

Ч

Ч

π

V

REF

g

m

R

1

R

2

V

OUT

R

I

COMP

C

I

C

CF

R

F

C

F

Figure 5. Type III Compensation Network

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