Rainbow Electronics MAX11008 - Manual (Page 26)

MAX11008
complete the ADC powers down, BUSY is pulled low,
and the results for all of the selected channels are
available in the FIFO.
The duration of the BUSY pulse is additive, depending
on the channel conversion sequence selected. The
BUSY pulse is set typically for 72µs by temperature
conversions; 52µs by PGAOUT conversions, and 7µs
by ADCIN conversions.
Clock Mode 01
In clock mode 01, power-up, acquisition, conversion,
and power-down are all initiated through a single pulse
on
CNVST and performed automatically using the inter-
nal oscillator. Initiate a scan by writing to the ADC con-
version register and setting
CNVST low for at least
20ns. The ADC sets the BUSY output high, powers up,
and scans all requested channels storing the results in
the FIFO if the ADCMON bit has been set. After the
scan is complete, the ADC powers down, BUSY is
pulled low, and the results for all of the selected chan-
nels are available in the FIFO. The BUSY pulse behav-
ior is identical to that of clock mode 00.
Externally Timed
Acquisitions and Conversions
Clock Mode 10
Clock mode 10 is reserved. Do not use this clock
mode.
Clock Mode 11
In clock mode 11, set the FBGON bit. Conversions are
initiated one at a time through
CNVST and performed
using the internal oscillator. In this mode, the acquisition
time is controlled by the time
CNVST is low. CNVST is
resynchronized by the internal oscillator, resulting in a
one-clock cycle (typically 320ns) uncertainty in the exact
sampling instant. Different timing parameters apply
depending if the conversion is temperature, from ADCIN,
or from PGAOUT (as specified in the
Clock Mode 00
section). Figure 15 shows a conversion time example.
Both internal and external temperature conversions are
internally timed. Pull
CNVST low for a minimum of 20ns
(t CNV11 ) to trigger a temperature conversion. The BUSY
output goes high and the temperature conversion result
is available in the FIFO (if the ADCMON bit is set) 72µs
(typ) after BUSY goes low again.
Dual RF LDMOS Bias Controller with
Nonvolatile Memory
26 ______________________________________________________________________________________
BUSY
CNVST
INTERNAL
OPERATIONS
TEMPERATURE
CONVERSION
70µs (typ)
INTERNAL TEMPERATURE READING, PGA1 OUTPUT, AND ADCIN1 CONVERSION TIMING IN CLOCK MODE 11
t CNV = 20ns (typ)
t
ACQ
= 30µs (typ)
t ACQ = 1.5µs (typ)
WRITE TO ADC
CONVERT REGISTER TO
SET UP ADC SCAN
FBGON = 1,
ADCMON = 1
TEMPERATURE
CONVERSION RESULT
AVAILABLE IN FIFO
IDLE MODE,
REF AND
TEMP
SENSOR
POWERED
PGA 1
ACQUISITION
END OF
SCAN
PGA 1
CONVERSION
22µs (typ)
IDLE MODE,
REF AND
TEMP
SENSOR
POWERED
ADCIN1
ACQUISITION
ADCIN1
CONVERSION
7µ
s (typ)
PGA 1 OUTPUT
CONVERSION
RESULT AVAILABLE
IN FIFO
ADCIN 1
CONVERSION
RESULT AVAILABLE
IN FIFO
Figure 15. ADC Clock Mode 11 Example