Rainbow Electronics MAX5097 - Manual (Page 16)

MAX5096/MAX5097
Compensation Network
The MAX5096/MAX5097 in LDO Mode are compensat-
ed internally with a compensation network around the
LDO error amplifier. When in Buck Mode, the DC-DC
g
M
amplifier must be externally compensated using a
network connected from COMP to ground. The current-
mode control architecture reduces the compensation
network to a single pole-zero. The RC and C network,
connected from the internal transconductance amplifier
output to SGND, can provide a single pole-zero pair.
Choose all the power components like the inductor,
output capacitor, and ESR first and design the com-
pensation network around them. Choose the closed-
loop bandwidth (f
C ) to be approximately 1/10 of the
switching frequency. See the following equations to cal-
culate the compensation values for the low-ESR output
capacitor with ESR zero frequency, approximately a
decade higher than f
C .
Calculate the dominant pole due to the output capaci-
tor (C
OUT ) and the load (R OUT ):
where R OUT = V OUT / I LOAD .
Calculate the R
C
using following equation:
where g
MC
is the control to output gain of the
MAX5096/MAX5097 buck converter and is equal to
1.06. V
ADJ is the feedback set point equal to 1.237V
and g m (transconductance amplifier gain) is equal to
136µS. See Figure 2.
Place a zero (f Z ) at 0.9 x f PO :
Finally, place a high-frequency pole at the frequency
equal to half of the converter switching frequency (f
SW ).
Place the compensation network physically close to the
MAX5096/MAX5097.
Switching Between LDO Mode
and Buck Mode
The MAX5096/MAX5097 switch between the Buck
Mode and LDO Mode on the fly. However, care must
be taken to reduce output glitch or overshoot during
the switching.
Buck Mode to LDO Mode
The LDO Mode is intended for the low 100mA output
current while the buck converter delivers up to 600mA
output current. It is important to first reduce the output
load below 100mA before switching to the LDO Mode.
If the output load is higher than 100mA, the
MAX5096/MAX5097 may go into the current limit and
the output will drop significantly. Whenever the mode is
changed, output is expected to glitch because the loop
dynamics change due to different error amplifiers when
operating in the LDO and Buck Modes. The output volt-
age undershoot can be minimized by reducing the out-
put load during switching and using larger output
capacitance.
LDO Mode to Buck Mode
When switching from the LDO Mode to Buck Mode, a
fixed amount of delay (32 cycles) is applied so that the
buck converter control loop and oscillator reach their
steady-state conditions. The 32-cycle delay translates
to approximately 250µs and 100µs for 150kHz and
330kHz switching frequency versions, respectively. It is
recommended that the output load of 600mA must be
delayed by at least this much time to allow the
MAX5096/MAX5097 to switch to high-current Buck
Mode. This ensures that the output does not drop due
to the LDO current-limit protection mechanism.
PC Board Layout Guidelines
1) Proper PC board layout is essential. Minimize
ground noise by connecting the anode of the free-
wheeling rectifier, the input bypass capacitor
ground lead, and the output filter capacitor ground
lead to a large PGND plane.
2) Minimize lead lengths to reduce stray capacitance,
trace resistance, and radiated noise. In particular,
place the Schottky/fast recovery rectifier diode right
next to the device.
C
R f
P
C SW
=
Ч Ч
1
π
C
R f
C
CFPO PO
=
Ч Ч Ч
1
2
π
R
V f
g R g V f
C
O C
MC OUT m ADJ PO
=
Ч
Ч Ч Ч Ч
f
C R
PO
OUT OUT
=
Ч Ч Ч
1
2 π
40V, 600mA Buck Converters with Low-
Quiescent-Current Linear Regulator Mode
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