Rainbow Electronics U3745BM - Manual (Page 16)

16
U3745BM
4663A–RKE–06/03
Figure 13. Synchronization of the Demodulator Output
Figure 14. Debouncing of the Demodulator Output
Figure 15. Steady L State Limited DATA Output Pattern after Transmission
After the end of a data transmission, the receiver remains active and random noise
pulses appear at pin DATA. The edge-to-edge time period t
ee
of the majority of these
noise pulses is equal to or slightly higher than T
DATA_min
.
Switching the Receiver Back
to Sleep Mode The receiver can be set back to polling mode via pin DATA or via pin ENABLE.
When using pin DATA, this pin must be pulled to Low for the period t1 by the connected
microcontroller. Figure 16 illustrates the timing of the OFF command (see also Figure
20). The minimum value of t1 depends on the BR_Range. The maximum value for t1 is
not limited but it is recommended not to exceed the specified value to prevent erasing
the reset marker. This item is explained in more detail in the section “Configuration of
the Receiver”. Setting the receiver to sleep mode via DATA is achieved by programming
bit 1 of the OPMODE register to 1. Only one sync pulse (t3) is issued.
The duration of the OFF command is determined by the sum of t1, t2 and t10. After the
OFF command, the sleep time T
Sleep
elapses. Note that the capacitive load at Pin DATA
is limited. The resulting time constant t together with an optional external pull-up resistor
may not be exceeded to ensure proper operation.
If the receiver is set to polling mode via pin ENABLE, an ‘L’ pulse (T
Doze
) must be issued
at that pin. Figure 17 illustrates the timing of that command. After the positive edge of
Clock Bit check
counter
DATA
T
Dem_out
XClk
t
ee
DATA
tmin1
CV_Lim < Lim_min or CV_Lim ³ Lim_max
Lim_min £ CV_Lim < Lim_max
Dem_out
t
ee
t
ee
tmin2
Bit check
Enable IC
DATA
Sleep Mode Receiving Mode
t
tmin2 Bit check Mode
DATA_L_max
Dem_out