Rainbow Electronics DS2130Q - Manual (Page 20)

DS2130Q
041295 20/22
t t
t
t t
t t
t t
t
t
t
HOLD
HD
HF
HF
SF
SD
t
3–STATE
(MSB)
(MSB)
WH WL
P
F R
CPXCLK
PCMCLK
CPXFS
PCMFS
CPXFS
PCMFS
CPXIN
PCMIN
CPXOUT
PCMOUT
DO DZ
PCM INTERFACE AC TIMING DIAGRAM Figure 14
MCLK
t
t t
t t
t
RST
RM FM
PM
WMH WML
RST
SCLK
SDI
t
t
t
t
t t
t
t
t t
SCC
CC CH
CL
R F
CCH
CWH
CDH
DC
SERIAL PORT AC TIMING DIAGRAM
NOTE:
SCLK may be either high or low when CS is taken low.
MASTER CLOCK / RESET AC TIMING DIAGRAM Figure 15
Figure 16
CS