Atmega128rfa1 – Rainbow Electronics ATmega128RFA1 User Manual
Page 283

283
8266A-MCU Wireless-12/09
ATmega128RFA1
18.11.26 OCR3CL – Timer/Counter3 Output Compare Register C Low Byte
Bit
7
6
5
4
3
2
1
0
NA ($9C)
OCR3CL7:0
OCR3CL
Read/Write
R
RW
RW
RW
RW
RW
RW
RW
Initial Value
0
0
0
0
0
0
0
0
The Output Compare Registers contain a 16-bit value that is continuously compared
with the counter value (TCNT3). A match can be used to generate an Output Compare
interrupt, or to generate a waveform output on the OC3C pin. The Output Compare
Registers are 16-bit in size. To ensure that both the high and low bytes are written
simultaneously when the CPU writes to these registers, the access is performed using
an 8-bit temporary High Byte Register (TEMP). This temporary register is shared by all
the other 16-bit registers. See section "Accessing 16-bit Registers" for details.
•
Bit 7:0 – OCR3CL7:0 - Timer/Counter3 Output Compare Register Low Byte
18.11.27 ICR3H – Timer/Counter3 Input Capture Register High Byte
Bit
7
6
5
4
3
2
1
0
NA ($97)
ICR3H7:0
ICR3H
Read/Write
R
R
R
R
R
R
R
R
Initial Value
0
0
0
0
0
0
0
0
The Input Capture Register is updated with the counter (TCNT3) value each time an
event occurs on the ICP3 pin. The Input Capture Register can be used for defining the
counter TOP value. The Input Capture Register is 16-bit in size. To ensure that both the
high and low bytes are read simultaneously when the CPU accesses these registers,
the access is performed using an 8-bit temporary High Byte Register (TEMP). This
temporary register is shared by all the other 16-bit registers. See section "Accessing 16-
bit Registers" for details.
•
Bit 7:0 – ICR3H7:0 - Timer/Counter3 Input Capture Register High Byte
18.11.28 ICR3L – Timer/Counter3 Input Capture Register Low Byte
Bit
7
6
5
4
3
2
1
0
NA ($96)
ICR3L7:0
ICR3L
Read/Write
R
R
R
R
R
R
R
R
Initial Value
0
0
0
0
0
0
0
0
The Input Capture Register is updated with the counter (TCNT3) value each time an
event occurs on the ICP3 pin. The Input Capture Register can be used for defining the
counter TOP value. The Input Capture Register is 16-bit in size. To ensure that both the
high and low bytes are read simultaneously when the CPU accesses these registers,
the access is performed using an 8-bit temporary High Byte Register (TEMP). This
temporary register is shared by all the other 16-bit registers. See section "Accessing 16-
bit Registers" for details.
•
Bit 7:0 – ICR3L7:0 - Timer/Counter3 Input Capture Register Low Byte