Figure 3-4. master clock pll diagram – Rainbow Electronics DS26503 User Manual

Page 14

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DS26503 T1/E1/J1 BITS Element

14 of 123

Figure 3-4. Master Clock PLL Diagram






PRE-SCALER

DIVIDE BY 1, 2, 4,

OR 8

MCLK PIN

2.048MHz to

1.544MHz PLL

JA CLOCK

TO CLOCK AND DATA

RECOVERY ENGINE IN

RECEIVE LIU

X12,X16

MULTIPLIER

PLL

LIC2.3

(JACKS)

LIC4.6

(MPS0)

LIC4.7

(MPS1)

(HARDWARE MODE PIN NAME)

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