Rainbow Electronics APC58120 - Manual (Page 10)

INTEGRATED CIRCUITS INC.--
APC58120
www.aplusinc.com.tw Page / 18 VER1.0 10
35) 22H [15:6] <C0> Channel 0 data register {RW}
36) 23H [11:0] OTH OTHER register
[1:0] <CONFIG_wtc1,CONFIG_wtc0>
x0 for watchdog timer disabled all the time
01 for watchdog timer disabled during sleep or stand-by mode
11 for watchdog timer enabled all the time (default)
[2]<LVDEN> Low Voltage reset enable
0 : disable(default)
1 : enable
[3]<LVDSEL> Low Voltage reset voltage select
0 : Lower 1.4~1.8V(default)
1 : Higher 2.1~2.8V
[4]<C0ALPASSEN> C0 register Pass to temp0 register {see figure 1}
0:whether pass controlled by Timer A (default)
1:always pass
[5]< TMRAOVPASSEN > Timer A overflow signal pass enable
0:disable (default)
1:enable
[6]<C1PASSEN> C1 register Pass to temp1 register {see figure 1}
0:whether pass controlled by Timer B (default)
1:always pass
[7]<TMRBOVPASSEN>Timer B overflow signal pass enable
0:disable (default)
1:enable
[8]<MIX0sel> select channel 0 data or mixed data
0:select channel 0 Data (default)
1: select Mix Data
[9]<MIX1sel> select channel 1 data or mixed data
0:select channel 0 Data(default)
1: select Mix Data
[10]<DACDatasel> DAC select MUX0 data or MUX1 data
0:select MUX0 Data(default)
1: select MUX1 Data
[11]<PWMDatasel> PWM select MUX0 data or MUX1 data
0:select MUX0 Data(default)
1: select MUX1 Data
[13:12] REG[1:0]
They are unused
[14] pwmdousel
0:select 1’s order modulator
1:select 2’s order modulator(default)
37) 24H[10:0] Pre Index Register
38) 25H[0]
[0] <PLLsel>
0: System Clock = PLL(default)
1: System Clock = 32768Hz
[1]< pllbypasssel>
0: select 1/2 PLL clock(default)
1: select PLL clock