Figure 5, At40k/at40klv series fpga, Figure 5. the cell – Rainbow Electronics AT40K40LV User Manual
Page 9: Pass gates
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9
AT40K/AT40KLV Series FPGA
0896C–FPGA–04/02
Figure 5. The Cell
OUT
OUT
RESET/SET
CLOCK
FB
X = Diagonal Direct Connect or Bus
Y = Orthogonal Direct Connect or Bus
W = Bus Connection
Z = Bus Connection
FB = Internal Feedback
1
0
Z
D
Q
"1" NW NE SE SW
"1"
"1"
"1"
"0"
X
W
Y
X
Z
W
Y
"1" N E S W
8X1 LUT
8X1 LUT
X
Y
NW NE SE SW
N E S W
V1
H1
V2
H2
V3
H3
V4
H4
V5
H5
"1" OE
H
OE
V
L
Pass gates
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