Receive side ac timing figure 14–4 – Rainbow Electronics DS2154 User Manual
Page 62
Advertising

DS2154
031197 62/69
MOTOROLA BUS AC TIMING (BTS=1/MUX=1) Figure 14–3
AS
DS
R/W
AD0-AD7
(READ)
CS
AD0-AD7
(WRITE)
PW
ASH
PW
EL
t
CYC
t
RWS
t
ASD
t
RWH
t
DDR
t
DHR
t
CH
t
CS
t
AHL
t
ASL
t
DHW
t
DSW
t
AHL
t
ASL
t
ASED
PW
EH
RECEIVE SIDE AC TIMING Figure 14–4
RCLK
RSER/RDATA/RSIG
RCHCLK
RCHBLK
RFSYNC/RMSYNC
RSYNC
1
RLCLK
2
RLINK
t
D1
t
D2
t
D2
t
D2
t
D2
t
D2
t
D1
MSB OF
CHANNEL 1
Sa4 TO Sa8
BIT POSITION
NOTES:
1. RSYNC is in the output mode (RCR1.5=0).
2. RLCLK will only pulse high during Sa bit locations as defined in RCR2; no relationship between RLCLK and
RSYNC or RFSYNC is implied.
Advertising