Registers, Table 59), At8xc51snd1c – Rainbow Electronics AT89C51SND1C User Manual
Page 50

50
AT8xC51SND1C
4109E–8051–06/03
Registers
Table 59. PCON Register
PCON (S:87h) – Power Configuration Register
Reset Value = XXXX 0000b
7
6
5
4
3
2
1
0
-
-
-
-
GF1
GF0
PD
IDL
Bit
Number
Bit
Mnemonic
Description
7 - 4
-
Reserved
The value read from these bits is indeterminate. Do not set these bits.
3
GF1
General-purpose flag 1
One use is to indicate whether an interrupt occurred during normal operation or
during Idle mode.
2
GF0
General-purpose flag 0
One use is to indicate whether an interrupt occurred during normal operation or
during Idle mode.
1
PD
Power-down Mode bit
Cleared by hardware when an interrupt or reset occurs.
Set to activate the Power-down mode.
If IDL and PD are both set, PD takes precedence.
0
IDL
Idle Mode bit
Cleared by hardware when an interrupt or reset occurs.
Set to activate the Idle mode.
If IDL and PD are both set, PD takes precedence.