Figure 1, Figure 2, Figure 1. nonpage mode timing – Rainbow Electronics DS89C450 User Manual
Page 7
DS89C430/DS89C440/DS89C450
7 of 48
Note 15: The clock divide and crystal multiplier control bits in the PMR register determine the system clock frequency and the minimum/
maximum external clock speed. The term “1/t
CLCL
” used in the AC Characteristics variable timing table is determined from the
following table. The minimum/maximum external clock speed columns clarify that [(external clock speed) x (multipliers)] cannot
exceed the rated speed of the device. In addition, the use of the crystal multiplier feature establishes a minimum external speed.
External Clock Speed
4X/
2X
CD1 CD0
Number of External Clock
Cycles per System Clock
(1/t
CLCL
)
Min Max
1 0 0
1
10MHz
8.25MHz
0 0 0
2
5MHz
16.5MHz
X 0 1
Reserved
—
—
X
1
0
4
See AC Characteristics
See AC Characteristics
X
1
1
1/1024
See AC Characteristics
See AC Characteristics
Note 16:
External MOVX instruction times are dependent upon the setting of the MD2, MD1, and MD0 bits in the clock control register. The
terms “t
STC1
, t
STC2
, t
STC3
” used in the variable timing table above are calculated through the use of the table given below.
MD2 MD1 MD0 MOVX
Instruction
Time t
STC1
t
STC2
t
STC3
t
STC4
t
STC5
0
0
0
2 Machine Cycles
0 t
CLCL
0
t
CLCL
0
t
CLCL
0
t
CLCL
0
t
CLCL
0
0
1
3 Machine Cycles
2 t
CLCL
1
t
CLCL
0
t
CLCL
0
t
CLCL
1
t
CLCL
0
1
0
4 Machine Cycles
6 t
CLCL
1
t
CLCL
0
t
CLCL
0
t
CLCL
1
t
CLCL
0
1
1
5 Machine Cycles
10 t
CLCL
1
t
CLCL
0
t
CLCL
0
t
CLCL
1
t
CLCL
1
0
0
6 Machine Cycles
14 t
CLCL
5
t
CLCL
4
t
CLCL
1
t
CLCL
1
t
CLCL
1
0
1
7 Machine Cycles
18 t
CLCL
5
t
CLCL
4
t
CLCL
1
t
CLCL
1
t
CLCL
1
1
0
8 Machine Cycles
22 t
CLCL
5
t
CLCL
4
t
CLCL
1
t
CLCL
1
t
CLCL
1
1
1
9 Machine Cycles
26 t
CLCL
5
t
CLCL
4
t
CLCL
1
t
CLCL
1
t
CLCL
Note 17:
Maximum load capacitance (to meet the above timing) for Port 0, ALE,
PSEN, WR, and RD is limited to 60pF. XTAL1 and XTAL2 load
capacitance are dependent upon the frequency of the selected crystal.
Figure 1. Nonpage Mode Timing
ALE
Port 0
Port 2
LSB
DATA
XTAL1
PSEN
RD
MSB
MSB
MSB
MSB
MSB
WR
LSB
LSB
LSB
LSB
DATA
MOVX
MOVX
OPCODE
t
CLCL
t
AVLL2
t
LHLL
t
WLWH
t
LLAX2
t
LLWL
t
LLPL
t
LLAX
t
LLIV
t
AVIV0
t
PXIX
t
PLPH
t
PLIV
t
AVLL3
t
LLAX3
t
RLRH
t
PLAZ
t
WHLH
t
WHQX
t
QVWX
t
AVIV2
t
AVDV2
t
AVWL2
t
PXIZ
t
AVLL
t
LLDV
t
AVDV0
t
RHDX
t
RHDZ
t
RLDV
t
AVWL0