Rainbow Electronics ADC1173 - Manual (Page 3)

Pin Descriptions and Equivalent Circuits
(Continued)
Pin
No. Symbol Equivalent Circuit
Description
17 V
RT
Analog Input that is the high (top) side of the
reference ladder of the ADC. Nominal range is 1.0V
to AV
DD
. Voltage on V
RT
and V
RB
inputs define the
V
IN
conversion range. Bypass well. See Section 2.0
for more information.
23 V
RB
Analog Input that is the low (bottom) side of the
reference ladder of the ADC. Nominal range is 0V to
2.0V. Voltage on V
RT
and V
RB
inputs define the V
IN
conversion range. Bypass well. See Section 2.0 for
more information.
22 V
RBS
Reference Bottom Bias with internal pull down
resistor. Short to V
RB
to self bias the reference
ladder.
1 OE
CMOS/TTL compatible Digital input that, when low,
enables the digital outputs of the ADC1173. When
high, the outputs are in a high impedance state.
12 CLK
CMOS/TTL compatible digital clock Input. V
IN
is
sampled on the falling edge of CLK input.
3 thru
10
D0-D7
Conversion data digital Output pins. D0 is the LSB,
D7 is the MSB. Valid data is output just after the
rising edge of the CLK input. These pins are enabled
by bringing the OE pin low.
11, 13 DV
DD
Positive digital supply pin. Connect to a clean, quiet
voltage source of +3V. AV
DD
and DV
DD
should have
a common source and be separately bypassed with a
10µF capacitor and a 0.1µF ceramic chip capacitor.
See Section 3.0 for more information.
ADC1
173
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