Rainbow Electronics AT89C5132 - Manual (Page 153)

153
AT8xC5132
4173A–8051–08/02
Waveforms Figure 131. Flash Memory – ISP Waveforms
Note: ISP must be driven through a pull-down resistor (see Section “In-system Programming”,
page 140).
Figure 132. Flash Memory – Internal Busy Waveforms
External Clock Drive and Logic Level References
Definition of Symbols Table 145. External Clock Timing Symbol Definitions
Timings Table 146. External Clock AC Timings
V
DD
= 2.7 to 3.3V, T
A
= 0 to 70 ° C
Waveforms Figure 133. External Clock Waveform
RST
T
SVRL
ISP1
T
RLSX
FBUSY bit
T
BHBL
Signals Conditions
C Clock H High
L Low
X No Longer Valid
Symbol Parameter Min Max Unit
T
CLCL
Clock Period 50 ns
T
CHCX
High Time 10 ns
T
CLCX
Low Time 10 ns
T
CLCH
Rise Time 3 ns
T
CHCL
Fall Time 3 ns
T
CR
Cyclic Ratio in X2 Mode 40 60 %
0.45 V
T
CLCL
V
DD
- 0.5
V
IH1
V
IL
T
CHCX
T
CLCH
T
CHCL
T
CLCX