Rainbow Electronics ATtiny10 - Manual (Page 80)

80
8127B–AVR–08/09
ATtiny4/5/9/10
This ensures that the Timer/Counter is halted and can be configured without the risk of advanc-
ing during configuration. When the TSM bit is written to zero, the PSR bit is cleared by hardware,
and the Timer/Counter start counting.
• Bit 0 – PSR: Prescaler 0 Reset Timer/Counter 0
When this bit is one, the Timer/Counter0 prescaler will be Reset. This bit is normally cleared
immediately by hardware, except if the TSM bit is set.