Rainbow Electronics ATR0601 - Manual (Page 4)

4
4866A–GPS–08/05
ATR0601 [Preliminary]
3.7 VGA/AGC
The output of the IF-Filter drives an on-chip Variable Gain Amplifier (VGA) which is combined
with additional low-pass filtering. The on-chip Automatic Gain Control (AGC) stage sets the gain
of the VGA in order to optimally charge the input of the following analog-to-digital converter. The
AGC control loop can be selected for on-chip closed loop operation or for external gain control
mode. For external gain control mode, the loop needs to be closed by the baseband IC
ATR0621.
3.8 A/D Converter
The analog-to-digital converter stage has a total resolution of 1.5 bit. It comprises balanced com-
parators and a sub sampling unit, clocked by the reference frequency (f
XTO
). The frequency
spectrum of the digital output signal (f
OUT
), present at the data outputs SL and SH, is then given
by: f
OUT
=
⏐
f
IF
– f
XTO
×
n
⏐
. The selected sub sampling factor (n = 4) leads to the designated
digital output signal, with a centre frequency given by:
f
OUT
= f
IF
– f
XTO
×
4 = 96.764 MHz – 23.104 MHz – 4 = 4.348 MHz.
3.9 Clock and Data Driver
CMOS output drivers are providing sign and magnitude bits as well as the system clock to the
baseband IC ATR0621. The rail-to-rail output signal level is determined by the digital supply volt-
age (VDIG).