Signal descriptions – Rainbow Electronics DS1677 User Manual

Page 3

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DS1677

3 of 17

SIGNAL DESCRIPTIONS

V

CC

, GND – DC power is provided to the device on these pins. V

CC

is the +5.0 volt input.

V

BAT

(Backup Power Supply) – Battery input for standard 3 volt lithium cell or other energy source.

SCLK (Serial Clock Input) – SCLK is used to synchronize data movement on the serial interface.

I/O (Data Input/Output) – The I/O pin is the bi–directional data pin for the 3–wire interface.

CS (Chip Select) – The Chip Select signal must be asserted high during a read or a write for
communication over the 3–wire serial interface. CS has an internal 40k ohm pull down resistor

V

CCO

(External SRAM Power Supply Output) – This pin is internally connected to V

CC

when V

CC

is

within nominal limits. However, during power–fail V

CCO

is internally connected to the V

BAT

pin.

Switchover occurs when V

CC

drops below V

CCSW

.

INT (Interrupt Output) – The INT pin is an active high output of the DS1677 that can be used as an
interrupt input to a microprocessor. The INT output remains high as long as the status bit causing the
interrupt is present and the corresponding interrupt–enable bit is set. The INT pin operates when the
DS1677 is powered by V

CC

or V

BAT

.

CEI (SRAM Chip Enable In)

CEI

must be driven low to enable the external SRAM.

CEO (SRAM Chip Enable Output) – Chip enable output for SRAM.

PFI (Power–Fail Input) – Power–Fail comparator input. When PFI is less than 1.25V,

PFO

goes low;

otherwise

PFO

remains high. Connect PFI to GND or V

CC

when not used.

PFO (Power–Fail Output) – Power–Fail output goes low and sinks current when PFI is less than 1.25V;
otherwise

PFO

remains high.

ST (Strobe Input) – The Strobe input pin is used in conjunction with the watchdog timer. If the

ST

pin

is not driven low within the watchdog time period, the

RST

pin is driven low.

RST (Reset) – The

RST

pin functions as a microprocessor reset signal. This pin is driven low 1) when

V

CC

is outside of nominal limits; 2) when the watchdog timer has “timed out”; 3) during the power–up

reset period; and 4) in response to a push–button reset. The

RST

pin also functions as a push-button reset

input. When the

RST

pin is driven low, the signal is debounced and timed such that a

RST

signal of at

least 250 ms is generated. This pin has an open drain output with an internal 47 k

Ω pull up resistor.

AIN0, AIN1, AIN2 (Analog Inputs) – These pins are the three analog inputs for the 3–channel
analog-to-digital converter.

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