Rainbow Electronics AT86RF230 - Manual (Page 20)

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AT86RF230
5131A-ZIGB-06/14/06
6. Functional Description
6.1. RSSI/Energy Detection
The internal limiter amplifier provides an RSSI value which reflects the current receive signal strength at the
antenna pin of the AT86RF230. The RSSI is a 5-bit value indicating the receive power in steps of 3 dB (see register
0x06), and is updated every 2 µs.
The receiver ED measurement is used with the channel-scan algorithm. An ED request (write access to register
0x07) as defined by the IEEE 802.15.4 standard has a measurement time of 128 µs. The ED measurement result
is accessible after the measurement time at register 0x07 (PHY_ED_LEVEL). With every frame reception (SFD
detection), an ED measurement is automatically started. The ED measurement result has the same range as the
RSSI value (register 0x06), but with a 1 dB resolution.
6.2. Link Quality Indication
The IEEE 802.15.4 standard defines the link quality indication (LQI) measurement as a “characterization of the
strength and/or quality of a received packet”. The LQI measurement of the AT86RF230 is implemented as a
characterization of both the quality and signal strength. An average correlation value of multiple symbols is
calculated and appended to each frame after scaling to a value ranging from 0 to 255. The minimum LQI value of 0
is associated with a low signal quality, resulting from high signal distortions, and/or a signal strength that is below
the receiver sensitivity. The maximum value of 255 is associated with a signal strength higher than the receiver
sensitivity and a high signal quality resulting from low signal distortions. Signal distortions are mainly generated by
interference and multipath propagation.
6.3. Clear Channel Assessment
The IEEE 802.15.4 standard defines three clear channel assessment (CCA) modes:
• Mode 1: energy above threshold only
• Mode 2: carrier sense only
• Mode 3: carrier sense with energy above threshold
All three modes are available in AT86RF230. The modes are configurable via register 0x08 (PHY_CC_CCA). A
CCA request is initiated by writing to bit 7 in register 0x08 (PHY_CC_CCA). After the CCA evaluation time of
128 µs, the CCA result is accessible at register 0x01 (TRX_STATUS) bits 6 and 7. Bit 7 indicates whether the CCA
measurement is finished or not, bit 6 indicates a busy (bit 6 = 0) or clear channel. (bit 6 = 1)
The CCA modes are further configurable using register 0x09 (CCA_THRES).
The 4-bit value CCA_CS_THRES can be used for fine tuning the sensitivity of the CCA carrier sense algorithm.
Higher values increase the probability of clear channel detection.
The other 4-bit value (CCA_ED_THRES) of register 0x09 (CCA_THRES) defines the received power threshold of
the “energy above threshold” algorithm. Any received power above this level will indicate a busy channel. The
threshold is calculated by -91+2·CCA_ED_THRES [dBm], resulting in a range of -91 dBm to -61 dBm.
6.4. Voltage Regulators
Two identical low-dropout voltage regulators are integrated within the AT86RF230. The AVREG provides the
regulated 1.8V supply voltage for the analog section and the DVREG supplies the low-voltage digital section. A
simplified schematic is shown in Figure 6-1. The voltage regulators are connected internally to the external
unregulated supply voltage VDD. The regulated output voltage is available on pin VDEC1 or VDEC2. External
decoupling capacitors should be connected to these pins to stabilize the regulated supply voltage. A decoupling
capacitor value of 1 µF is recommended for stable operation of the voltage regulators (see chapter 9), but it can