Document Outline

• General Description
• Features
• Applications
• Typical Application Circuit
• Absolute Maximum Ratings
• Package Thermal Characteristics
• Electrical Characteristics
• AC Timing Characteristics
• Typical Operating Characteristics
• Pin Configuration
• Pin Description
• Pin Description by Function
• Functional Diagram
• Detailed Description
  • MII/RMII/FIFO Interface
    • MII Interface Signals
  • MII MAC and PHY Connections
    • Transmitting
    • Receiving
    • Reduced Media Independent Interface (RMII)
    • RMII Signal Timing
    • FIFO Interface Signals
    • Transmitting
    • Receiving
    • FIFO Read/Write Timing
  • Management Data Unit (MDU)
  • Ethernet Interface
  • UART Interface
  • USB Interface
• Applications Information
  • Disabling Ethernet and MII/RMII/FIFO Interface
    • Configure UART I/O as Follows to Disable UART Interface
    • Configure JTAG I/O as Follows to Disable JTAG Interface
  • Interfacing the MAX2982 to the MAX2981 Analog Front-End (AFE)
  • MAC Boot Options
    • GPIO Usage by MAX2982 Firmware
    • Upper-Layer Interface Settings
  • Temperature Sensor
• Ordering Information
• Chip Information
• Package Information
• Revision History
• LIST OF FIGURES
  • Figure 1. Ethernet MAC and MAX2982 Connection in MII Mode
  • Figure 2. Receive Defer in MII Mode
  • Figure 3. Transmission Behavior of the MII Interface
  • Figure 4. MII Interface Detailed Transmit Timing
  • Figure 5. Receive Behavior of the MII Interface
  • Figure 6. MII Interface Detailed Receive Timing
  • Figure 7. MAC-PHY Connection in RMII Mode
  • Figure 8. External Host and MAX2982 Connection in FIFO mode
  • Figure 9. Buffering FIFO Transmission Process from External Host
  • Figure 10. Transmission Timing of the Buffering (FIFO) Interface
  • Figure 11. Buffering FIFO Interface Receive Process from the External Host View
  • Figure 12. Receive Timing of Buffering (FIFO) Interface
  • Figure 13. MAX2982 FIFO Read Timing Diagram
  • Figure 14. MAX2982 FIFO Write Timing Diagram
  • Figure 15. Typical Interface Between a Microcontroller and MAX2982
  • Figure 16. Write Behavior of the Management Data Unit
  • Figure 17. Read Behavior of Management Data Unit
  • Figure 18. Transmit Timing for Ethernet MAC Interface
  • Figure 19. Receive Timing for Ethernet MAC Interface
  • Figure 20. MAX2982 UART Interface with Driver and DB9 Connector
  • Figure 21. USB Cable
  • Figure 22. MAX2981 AFE Interface to MAX2982
  • Figure 23. AFE TX Timing Diagram
  • Figure 24. AFE RX Timing Diagram
• LIST OF TABLES
  • Table 1. Upper Layer Interface Selection GPIO Settings
  • Table 2. MII Signal Description
  • Table 3. MII Interface Detailed Transmit Timing
  • Table 4. MII Interface Detailed Receive Timing
  • Table 5. RMII Signal Description
  • Table 6. FIFO Signal Description
  • Table 7. Upper-Layer Interface Selection GPIO Settings
  • Table 8. UART Interface Configuration
  • Table 9. Upper-Layer Interface Selection GPIO Settings
  • Table 10. MAX2982 to AFE Signal interface
  • Table 11. Boot Modes
  • Table 12. Boot Error Codes
  • Table 13. GPIO Pins Used by MAX2982 Firmware
  • Table 14. Upper-Layer Interface Settings