Quick look – Rainbow Electronics MAX1109 User Manual
Page 15
MAX1108/MAX1109
Single-Supply, Low-Power,
2-Channel, Serial 8-Bit ADCs
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15
CS does not need to be held low once a conversion is
started. Pulling CS high prevents data from being
clocked into the MAX1108/MAX1109 and three-states
DOUT, but it does not adversely affect an internal
clock-mode conversion already in progress. In this
mode, data can be shifted in and out of the
MAX1108/MAX1109 at clock rates up to 2MHz, provid-
ed that the minimum acquisition time (t
ACQ
) is kept
above 1µs.
Quick Look
To quickly evaluate the MAX1108/MAX1109’s analog
performance, use the circuit of Figure 9. The device
requires a control byte to be written to DIN before each
conversion. Tying CS to GND and DIN to V
DD
feeds in
control bytes of FFH. In turn, this triggers single-ended,
unipolar conversions on CH0 in relation to COM in
external clock mode without powering down between
conversions. Apply an external 50kHz to 500kHz clock
CS
SCLK
DIN
DOUT
1
4
8
START
SEL2
SEL1
SEL0
I/EREF I/ECLK
REF
SHDN
SHDN
D7
D6
D5
D4
D3
D2
D1
D0
t
ACQ
IDLE
IDLE
A/D STATE
10
14
18
t
CONV
35
µ
s MAX
Figure 8. Single Conversion Timing, Internal Clock Mode
1µF
0.1µF
V
DD
GND
CS
SCLK
DIN
DOUT
V
DD
0.01µF
CH0
COM
REF
C1
1µF
ANALOG
INPUT
OSCILLOSCOPE
CH1
CH2
5
µ
s/div
*CONVERSION RESULT = 10101010
MAX1108
MAX1109
V
SUPPLY
500kHz
OSCILLATOR
DOUT*
SCLK
MSB
LSB
Figure 9. Quick-Look Schematic