Figure 7 - primary uart transceiver header, 16 j3 – B&B Electronics WLNN-EK-DP551 - User Manual User Manual
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Airborne Enterprise WLNN EVB Users Guide
Designator
Pin
Description
4
RxD
5
TxD
6
CN1 Pin 3
7
TxD-
8
TxD+
9
CN1 Pin 9
10
CN1 Pin 6
11
TxD-
12
RxD-
13
CN1 Pin 8
14
CTS
15
RTS
16
CN1 Pin 7
5.16 J3
This header correctly enables the primary UART transceivers for the interface
type selected by the configuration of J2. The available options are shown in
Table 19.
TABLE 19 - PRIMARY UART TRANSCEIVER CONFIGURATION
Designator
Description
Configuration
J3
RS232
RS422/485
Software Select
FIGURE 7 - PRIMARY UART TRANSCEIVER HEADER
TABLE 20 - PRIMARY UART TRANSCEIVER HEADER PIN-OUT
Designator
Pin
Description
J3
1
RS422/485 Rx Enable (Active Low)
2
RXEN
3
GND
4
RS232 Rx Enable (Active Low) with 10KΩ Pull-up
5
3.3VDC