3 chipset, Chipset -25, Northbridge configuration – Asus M3N78 User Manual

Page 71

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ASUS M3N78

2-25

NorthBridge Chipset Configuration

Memory Configuration

ECC Configuration

NorthBridge Configuration

2.4.3

Chipset

The Chipset menu allows you to change the advanced chipset settings. Select an

item then press <Enter> to display the sub-menu.

Advanced Chipset Settings
WARNING: Setting wrong values in below

sections may cause system to malfunction.

NorthBridge Configuration

SouthBridge Configuration

Options for NB

Advanced

Memory Configuration

Bank Interleaving

[Auto]

Channel Interleaving

[Disabled]

Enable Clock to ALL DIMMs

[Disabled]

MemClk Tristate C3/ATLVID

[Disabled]

Memory Hole Remapping

[Enabled]

DCT Unganged Mode

[Auto]

Power Down Enable

[Enabled]

Enable Bank Memory

Interleaving

Memory Configuration

Bank Interleaving [Auto]

Allows you to enable the bank memory interleaving.

Configuration options: [Disabled] [Auto]

Channel Interleaving [Disabled]

Allows you to enable the channel memory interleaving.

Configuration options: [Disabled] [Address bits 6] [Address bits 12]

[XOR of Address bits [20:16,6] ] [XOR of Address bits [20:16,9] ]

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