Asus M2V-MX SE - Manual (Page 67)

ASUS M2V-MX SE 2-25
ECC Configuration
DRAM ECC Enable [Enabled]
4-Bit ECC Mode [Disabled]
DRAM SCRUB REDIRECT [Disabled]
DRAM BG Srub [Disabled]
ECC Configuration
DRAM ECC Enable [Enabled]
Enables or disables the DRAM ECC that allows hardware to report
and correct memory errors automatically to maintain system integrity.
Configuration options: [Disabled] [Enabled]
4-Bit ECC Mode [Disabled]
Enables or disables the 4-Bit ECC mode.
Configuration options: [Disabled] [Enabled]
DRAM SCRUB REDIRECT [Disabled]
Sets the system to correct DRAM ECC Errors immediately when they occur, even if
background scrubbing is on. Configuration options: [Disabled] [Enabled]
DRAM BG Scrub [Disabled]
Disables or sets the DRAM scrubbing functionality that corrects and rewrites memory
errors so later reads are correct. During this while the memory is not being used
improves performance. Configuration options: [Disabled] [40ns] [80ns] [160ns] [320ns]
[640ns] [1.28us] [2.56us] [5.12us] [10.2us] [20.5us] [41.0us] [81.9us] [163.8us]
[327.7us] [655.4us]
Power Down Control [Auto]
Allows DIMMs to enter power down mode by deasserting the clock enable
signal when DIMMs are not in use.
Configuration options: [Auto] [Disabled]