AAEON IMBA-880 Rev.B - Manual (Page 45)

I n d u s t r i a l M o t h e r b o a r d I M B A - 8 8 0 R e v . B
Appendix A Programming the Watchdog Timer A-5
WatchDog Timer Register III (Index=F7h, Default=00h)
Bit 7 : Mouse interrupt reset Enable or Disable
= 1 Watchdog Timer is reset upon a
Mouse interrupt
= 0 Watchdog Timer is not affected by
Mouse interrupt
Bit 6 : Keyboard interrupt reset Enable or
Disable
= 1 Watchdog Timer is reset upon a
Keyboard interrupt
= 0 Watchdog Timer is not affected by
Keyboard interrupt
Bit 5 : Force Watchdog Timer Time-out. Write
Only
= 1 Force Watchdog Timer time-out
event: this bit is self-clearing
Bit 4 : Watchdog Timer Status. R/W
= 1 Watchdog Timer time-out occurred
= 0 Watchdog Timer counting
Bit 3-0 : These bits select IRQ resource for
Watchdog. Setting of 2 selects SMI.