IEI Integration PE-5S2 v4.00 - Manual (Page 2)

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5. RESET: External Reset Button Connector
6. PWRGD: External Power Good Connector
7. SM-BUS: External System Management BUS Connector
8. CN1: PCIE X16 SDVO Control Signal Pin
9. IOPWR: The I/O Power Connector indicators for controlling your
CPU board
2 ●
1 ■
PIN DESCRIPTION
1 GND
2 SHB_RST#
2 ●
1 ■
PIN DESCRIPTION
1 GND
2 PWRGD
PIN DESCRIPTION
1 SMDAT
2 SMCLK
2 ●
1 ■
1 2 3
■ ● ●
PIN DESCRIPTION
1 EXP_EN
2 SDVO_CLK
3 SDVO_DAT
19 17 15 13 11 9 7 5 3 1
● ● ● ● ● ● ● ● ● ■
● ● ● ● ● ● ● ● ● ●
20 18 16 14 12 10 8 6 4 2
PIN DESCRIPTION PIN DESCRIPTION
1 GND 2 -12V
3 +12V 4 GND
5 IPMB_DA 6 5VSB
7 GND 8 GND
9 IPMB_CL 10 5VSB
11 +5V 12 PWRGD
13 SMDAT 14 SHB_RST#
15 5VSB 16 GND
17 SMCLK 18 PSON#
19 +3.3V 20 PWRBT#