3 global configuration parameters, 1 aux pll lock output configuration (auxlockcfg), 2 reference clock input divider (refclkdiv[1:0]) – Cirrus Logic CS2000-OTP User Manual
Page 24: 3 enable pll clock output on unlock (clkoutunl), 4 low-frequency ratio configuration (lfratiocfg), Aux pll, Cs2000-otp
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![3 global configuration parameters, 1 aux pll lock output configuration (auxlockcfg), 2 reference clock input divider (refclkdiv[1:0]) | 3 enable pll clock output on unlock (clkoutunl), 4 low-frequency ratio configuration (lfratiocfg), Aux pll, Cs2000-otp | Cirrus Logic CS2000-OTP User Manual | Page 24 / 30](/screens/482564/24.png)
3 global configuration parameters, 1 aux pll lock output configuration (auxlockcfg), 2 reference clock input divider (refclkdiv[1:0]) | 3 enable pll clock output on unlock (clkoutunl), 4 low-frequency ratio configuration (lfratiocfg), Aux pll, Cs2000-otp | Cirrus Logic CS2000-OTP User Manual | Page 24 / 30
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