Cirrus Logic CS2000-CP User Manual

Cs2000-cp, Fractional-n clock synthesizer & clock multiplier, Features

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Copyright

Cirrus Logic, Inc. 2010

(All Rights Reserved)

http://www.cirrus.com

Fractional-N Clock Synthesizer & Clock Multiplier

Features

Delta-Sigma Fractional-N Frequency Synthesis

Generates a Low Jitter 6 - 75 MHz Clock
from an 8 - 75 MHz Reference Clock

Clock Multiplier / Jitter Reduction

Generates a Low Jitter 6 - 75 MHz Clock
from a Jittery or Intermittent 50 Hz to
30 MHz Clock Source

Highly Accurate PLL Multiplication Factor

Maximum Error Less Than 1 PPM in High-
Resolution Mode

I²C™ / SPI™ Control Port

Configurable Auxiliary Output

Flexible Sourcing of Reference Clock

External Oscillator or Clock Source

Supports Inexpensive Local Crystal

Minimal Board Space Required

No External Analog Loop-filter
Components

General Description

The CS2000-CP is an extremely versatile system
clocking device that utilizes a programmable phase
lock loop. The CS2000-CP is based on a hybrid ana-
log-digital PLL architecture comprised of a unique
combination of a Delta-Sigma Fractional-N Frequency
Synthesizer and a Digital PLL. This architecture allows
for both frequency synthesis/clock generation from a
stable reference clock as well as generation of a low-
jitter clock relative to an external noisy synchronization
clock. The design is also unique in that it can generate
low-jitter clocks relative to noisy external synchroniza-
tion clocks at frequencies as low as 50 Hz. The
CS2000-CP supports both I²C and SPI for full software
control.

The CS2000-CP is available in a 10-pin MSOP pack-
age in Commercial (-10°C to +70°C) and Automotive
(-40°C to +85°C) grades. Customer development kits
are also available for device evaluation. Please see

“Ordering Information” on page 36

for complete details.

I²C / SPI

Auxiliary
Output

6 to 75 MHz
PLL Output

3.3 V

I²C/SPI

Software Control

8 MHz to 75 MHz

Low-Jitter Timing

Reference

Fractional-N

Frequency Synthesizer

Digital PLL & Fractional

N Logic

Output to Input

Clock Ratio

N

Timing Reference

PLL Output

Lock Indicator

50 Hz to 30 MHz

Frequency

Reference

Output to Input

Clock Ratio

Frequency Reference

MAY '10

DS761F2

CS2000-CP

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