6 ratio 0 - 3 (address 06h - 15h), 7 function configuration 1 (address 16h), 1 clock skip enable (clkskipen) – Cirrus Logic CS2000-CP User Manual
Page 31: P 31, Cs2000-cp
CS2000-CP
DS761F2
31
8.5.2
Enable Device Configuration Registers 2 (EnDevCfg2)
This bit, in conjunction with EnDevCfg1, configures the device for control port mode. These EnDevCfg
bits can be set in any order and at any time during the control port access sequence, however they must
both be set before normal operation can occur.
Note:
EnDevCfg1 must also be set to enable control port mode. See
.
8.6
Ratio 0 - 3 (Address 06h - 15h)
These registers contain the User Defined Ratios as shown in the
“Register Quick Reference” section on
. Each group of 4 registers forms a single 32-bit ratio value as shown above. See
Frequency Ratio Configuration” on page 19
and
“Calculating the User Defined Ratio” on page 34
for more
details.
8.7
Function Configuration 1 (Address 16h)
8.7.1
Clock Skip Enable (ClkSkipEn)
This bit enables clock skipping mode for the PLL and allows the PLL to maintain lock even when the
CLK_IN has missing pulses.
Note:
f
CLK_IN
must be < 80 kHz and re-applied within
20
ms to use this feature.
EnDevCfg2
Register State
0
Disabled.
1
Enabled.
Application:
“SPI / I²C Control Port” on page 24
7
6
5
4
3
2
1
0
MSB
...................................................................................................................................................
MSB-7
MSB-8
...................................................................................................................................................
MSB-15
LSB+15
...................................................................................................................................................
LSB+8
LSB+7
...................................................................................................................................................
LSB
7
6
5
4
3
2
1
0
ClkSkipEn
AuxLockCfg
Reserved
RefClkDiv1
RefClkDiv0
Reserved
Reserved
Reserved
ClkSkipEn
PLL Clock Skipping Mode
0
Disabled.
1
Enabled.
Application: