27 awg overflow interrupt enable register (1ah), 28 awg overflow interrupt status register (1bh), 29 reserved register (1ch) – Cirrus Logic CS61884 User Manual

Page 41: 30 reserved register (1dh), 31 bits clock enable register (1eh), 32 reserved register (1fh), Bits clock enable register (1eh), See section 14.31

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27 awg overflow interrupt enable register (1ah), 28 awg overflow interrupt status register (1bh), 29 reserved register (1ch) | 30 reserved register (1dh), 31 bits clock enable register (1eh), 32 reserved register (1fh), Bits clock enable register (1eh), See section 14.31 | Cirrus Logic CS61884 User Manual | Page 41 / 72 27 awg overflow interrupt enable register (1ah), 28 awg overflow interrupt status register (1bh), 29 reserved register (1ch) | 30 reserved register (1dh), 31 bits clock enable register (1eh), 32 reserved register (1fh), Bits clock enable register (1eh), See section 14.31 | Cirrus Logic CS61884 User Manual | Page 41 / 72
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