MSI FM2-A75MA-P33 - Manual (Page 52)

2-12
BIOS Setup
tCL
Controls CAS latency whch determnes the tmng delay (n clock cycles) of startng
a read command after recevng data.
tRCD
Determnes the tmng of the transton from RAS (row address strobe) to CAS
(column address strobe). The less clock cycles, the faster the DRAM performance.
tRP
Controls number of cycles for RAS (row address strobe) to be allowed to pre-charge.
If nsufficent tme s allowed for RAS to accumulate before DRAM refresh, the DRAM
may fal to retan data. Ths tem apples only when synchronous DRAM s nstalled
n the system.
tRAS
Determnes the tme RAS (row address strobe) takes to read from and wrte to
memory cell.
tRFC
Ths settng determnes the tme RFC takes to read from and wrte to a memory
cell.
tWR
Determnes mnmum tme nterval between end of wrte data burst and the start of a
pre-charge command. Allows sense amplfiers to restore data to cell.
tWTR
Determnes mnmum tme nterval between the end of wrte data burst and the start
of a column-read command; allows I/O gatng to overdrve sense amplfies before
read command starts.
tRRD
Specfies the actve-to-actve delay of dfferent banks.
tRTP
Tme nterval between a read and a precharge command.
tFAW
Ths tem s used to set the tFAW (four actvate wndow delay) tmng.
tWCL
Ths tem s used to set the tWCL (Wrte CAS Latency) tmng.
tCKE
Ths tem s used to set the Pulse Wdth for DRAM module.
tRTL
Ths tem s used to set Round Trp Latency settngs.
Advanced Channel 1/ 2 Tmng Configuraton
Press <Enter> to enter the sub-menu. And you can set the advanced memory tmng
for each channel.
Spread Spectrum
Ths functon reduces the EMI (Electromagnetc Interference) generated by modulatng
clock generator pulses.
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