Document Outline

• 1 User Information
  • 1.1 About This Document
  • 1.2 Copyright Notice
  • 1.3 Trademarks
  • 1.4 Standards
  • 1.5 Warranty
  • 1.6 Technical Support
• 2 Introduction
  • 2.1 Product Description
  • 2.2 Naming clarification
  • 2.3 Understanding COM Express® Functionality
  • 2.4 COM Express® Documentation
  • 2.5 COM Express® Benefits
• 3 Product Specification
  • 3.1 Modules & Accessories
  • 3.2 Functional Specification
    • Processor
      • CPU specifications
    • Memory
    • Graphics Core
      • Monitor output
      • LVDS
      • Display Interfaces
    • Platform Controller Hub
    • Storage
    • Connectivity
      • Ethernet
    • Misc Interfaces and Features
    • Kontron Features
    • Additional features
    • Power Features
    • Power Consumption and Performance
    • Real Time Clock
  • 3.3 Block Diagram
  • 3.4 Electrical Specification
    • 3.4.1 Supply Voltage
    • 3.4.2 Power Supply Rise Time
    • 3.4.3 Supply Voltage Ripple
    • 3.4.4 Power Consumption
    • 3.4.5 ATX Mode
    • 3.4.6 Single Supply Mode
  • 3.5 Power Control
    • Power Supply
    • Power Button (PWRBTN#)
    • Power Good (PWR_OK)
    • Reset Button (SYS_RESET#)
    • SM-Bus Alert (SMB_ALERT#)
  • 3.6 Environmental Specification
    • 3.6.1 Temperature Specification
    • 3.6.2 Humidity
  • 3.7 Standards and Certifications
    • RoHS II
    • Component Recognition UL 60950-1
    • WEEE Directive
    • Conformal Coating
    • Shock & Vibration
    • EMC
    • PTCRB
  • 3.8 MTBF
  • 3.9 Mechanical Specification
    • Module Dimension
    • Height
  • 3.10 Thermal Management, Heatspreader and Cooling Solutions
• 4 Features and Interfaces
  • 4.1 Onboard SSD
    • Basic features of the SATA NANDrives
    • Single-level Cell (SLC) NANDrive™
    • Multi-level Cell (MLC) NANDrive™
  • 4.2 S5 Eco Mode
  • 4.3 LPC
  • 4.4 Serial Peripheral Interface (SPI)
  • 4.5 SPI boot
    • Recommended SPI boot flash types for 8-SOIC package
    • Using an external SPI flash
    • External SPI flash on Modules with Intel® ME
  • 4.6 M.A.R.S.
  • 4.7 UART
  • 4.8 CAN
  • 4.9 Fast I2C
  • 4.10 GPIO - General Purpose Input and Output
    • Configuration
  • 4.11 Dual Staged Watchdog Timer
    • Basics
    • Time-out events
    • WDT Signal
  • 4.12 Speedstep Technology
  • 4.13 C-States
  • 4.14 Hyper Threading
  • 4.15 ACPI Suspend Modes and Resume Events
  • 4.16 USB
    • Internal USB mapping
  • 4.17 SDIO
• 5 System Resources
  • 5.1 Interrupt Request (IRQ) Lines
    • 5.1.1 In 8259 PIC mode
    • 5.1.2 In APIC mode
  • 5.2 Memory Area
  • 5.3 I/O Address Map
  • 5.4 Peripheral Component Interconnect (PCI) Devices
  • 5.5 I2C Bus
  • 5.6 JILI I2C Bus
  • 5.7 SDVO I2C Bus
  • 5.8 System Management (SM) Bus
• 6 Pinout List
  • 6.1 General Signal Description
  • 6.2 Connector X1A Row A
  • 6.3 Connector X1A Row B
• 7 BIOS Operation
  • 7.1 Determining the BIOS Version
  • 7.2 BIOS Update
    • Backup the BIOS / Create a BIOS with custom defaults:
  • 7.3 Setup Guide
  • 7.4 POST Codes
    • 7.4.1 Start AMI® Aptio Setup Utility
      • Menu Bar
      • Legend Bar
      • Selecting an Item
      • Displaying Submenus
      • Item Specific Help Window
      • General Help Window
  • 7.5 BIOS Setup
    • 7.5.1 Main
      • Platform Information
    • 7.5.2 Advanced
      • PCI Subsystem Settings
      • PCI Express Settings
      • ACPI Settings
      • Thermal Configuration
      • Passive Cooling
      • ACPI Wake Event Configuration
      • CPU Configuration
      • Miscellaneous
      • Trusted Computing
      • Clock Control
      • Watchdog
      • Smart Battery Configuration
      • Battery Information
      • SMBus Speed
      • Onboard I2C Speed
      • USB Configuration
      • SDIO Configuration
      • Module H/W Monitor
      • Super IO Configuration
      • Serial Port 0 Configuration
      • Serial Port 1 Configuration
      • Parallel Port Configuration
      • Serial Port Console Redirection
      • COM0-3 Console Redirection Settings
      • Out-of-Band Management Port Console Redirection Settings
    • 7.5.3 Chipset
      • North Bridge Chipset Configuration
      • South Bridge Chipset Configuration
      • PCI Express Ports Configuration
      • PCI Express Root Port 0/1/2
      • PPM Config
    • 7.5.4 Boot
      • Boot Option Priority
      • HDD and CD/DVD-ROM group internal drive priority
    • 7.5.5 Security
    • 7.5.6 Save & Exit