13 ethernet interface, 14 spi bus interface, 15 lpc bus interface – Kontron COMe-cPV2(v1.0) User Manual

Page 44: Ethernet interface, Spi bus interface, Lpc bus interface

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Kontron microETXexpress-PV User’s Guide

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40

LVDS Flat Panel Interface (JILI)

The Intel® Atom processor has integrated 18-bit single channel LVDS for WXGA.

The user interface for flat panels is the JILI Intelligent LVDS Interface.

The implementation of this subsystem complies with the COM Express®

specification. For additional implementation information, refer to the PICMG

COM Express® Design Guide on the PIGMG website.

4.1.13

Ethernet Interface

The Ethernet interface on the microETXexpress®-PV-XT COM is the Intel®

82567LM 10/100/1000 Mbit Ethernet PHY. The GbE PHY is connected to the

GLCI/LCI of the ICH8M. The controller supports a 10/100/1000 Base-T interface

and it auto-negotiates the use of 10 Mbit/sec, 100 Mbit/sec or 1Gbit/sec

connections.

The interface supports functions such as WOL (WakeOnLAN) and PXE (Preboot

eXecution Environment) Lanboot.

For cable lengths and terminations on your baseboard, refer to the PICMG COM

Express® Design Guide on the PICMG website.

Configuration

The Ethernet controller is a PCI Express bus device. The BIOS allocates the

required system resources during the configuration of the PCIe device.

4.1.14

SPI Bus Interface

The Serial Peripheral Interface (SPI) signals are connected to the Intel®

ICH8M hub with pins that were previously reserved on the COM Express®

connector. The SPI interface can be used to connect one carrier board

devices, including external BIOS flash memory. The implementation of this

subsystem complies with the COM Express® specification. For additional

implementation information, refer to the PICMG COM Express® Design Guide on

the PICMG website

4.1.15

LPC Bus Interface

The Low Pin Count (LPC) interface signals are connected to the Intel® ICH8M.

The LPC low-speed interface can be used for peripheral circuits. For example,

it can be used as an external super I/O controller to combine legacy-device

support into a single IC. The implementation of this subsystem complies with

the COM Express® specification. For additional implementation information,

refer to the PICMG COM Express® Design Guide on the PICMG website.

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