Digilent 210-264P-BOARD - Manual

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FMC-HDMI™ Reference Manual
FMC-HDMI rev. D; Revised September 3, 2014; Author Elod Gyorgy
1 Overview
The FPGA Mezzanine Card High-Definition Multimedia Interface (FMC-HDMI) peripheral board enables developers
to add HDMI input ports to field-programmable gate array (FPGA) based systems. The FMC-HDMI provides a
development platform for customers to utilize high-definition image capturing for use with image processing
applications.
2 Functional Description
The FMC-HDMI card contains two HDMI input ports. The first port, HDMI1, contains an ADI ADV7611 Receiver and
outputs a decoded, level translated digital video signal to the FMC connector. The second port, HDMI2, contains an
ADI AD8195 Buffer and outputs an HDMI-encoded signal to the FMC connector, leaving the system board to
decode the signal (either in the FPGA or an external receiver).
The appropriateness of the HDMI port depends entirely on the application. For instance, although HDMI2 does not
decode the signal, it outputs to a smaller number of pins (14 instead of 36), which is useful in designs with limited
input availability. Since the decoding must be done on the connected system board, the circuitry must support
HDMI-type signaling that is TMDS. For example, Xilinx® FPGA families support the TMDS_33 input standard in 3.3V-
powered I/O banks.
2.1 HDMI1: Analog Devices ADV7611 Receiver
An Analog Devices ADV7611 Receiver decodes the signal on HDMI1. This low power, 165 MHz receiver supports
formats up to UXGA 60Hz at 8 bit at 161 MHz. It has been tested at WUXGA (1080p) 60Hz at 148.5 MHz. The
receiver provides an audio output port for audio extracted from the HDMI signal in the following formats: I
2 S,
Figure 1. FMC-HDMI.
• (2x) HDMI Type A Receptacles
• HDMI Receiver (ADV7611)
• HDMI Buffer (AD8195)
• On-board EDID EEPROM
• Male FMC LPC connector for digital signals
• Compatible with a wide range of VADJ voltages (1.8V –
3.3V)
DOC#: 502-264 Copyright Digilent, Inc. All rights reserved.
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