Maxim Integrated 71M6513H Power Meter IC Family Software - Manual (Page 118)

71M651x Software User’s Guide
Bit Symbol Function
TCON.7 TF1
The Timer 1 overflow flag is set by hardware when Timer 1 overflows. This flag
can be cleared by software and is automatically cleared when an interrupt is
processed.
TCON.6 TR1 Timer 1 Run control bit. If cleared, Timer 1 stops.
TCON.5 TF0
Timer 0 overflow flag set by hardware when Timer 0 overflows. This flag can be
cleared by software and is automatically cleared when an interrupt is
processed.
TCON.4 TR0 Timer 0 Run control bit. If cleared, Timer 0 stops.
TCON.3 IE1
Interrupt 1 edge flag is set by hardware when the falling edge on external pin
int1 is observed. Cleared when an interrupt is processed.
TCON.2 IT1
Interrupt 1 type control bit. Selects either the falling edge or low level on input
pin to cause an interrupt.
TCON.1 IE0
Interrupt 0 edge flag is set by hardware when the falling edge on external pin
int0 is observed. Cleared when an interrupt is processed.
TCON.0 IT0
Interrupt 0 type control bit. Selects either the falling edge or low level on input
pin to cause interrupt.
Table 6-24: The TCON Register Bit Functions
Allowed Combinations of Operation Modes
Table 6-25 specifies the combinations of operation modes allowed for timer 0 and timer 1.
Timer 1
Mode 0 Mode 1 Mode 2
Timer 0 - mode 0 YES YES YES
Timer 0 - mode 1 YES YES YES
Timer 0 - mode 2 Not allowed Not allowed YES
Table 6-25: Timer Modes
Timer/Counter Mode Control register (PCON):
MSB LSB
SMOD
Table 6-26: The PCON Register
The SMOD bit in the PCON register doubles the baud rate when set.
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