Table 5-3. peripheral register bit reset values -4, Maxq family user’s guide: maxq2010 supplement – Maxim Integrated MAXQ Family Users Guide: MAXQ2010 Supplement User Manual
Page 36
MAXQ Family User’s Guide:
MAXQ2010 Supplement
5-4
Table 5-2. Peripheral Register Bit Functions (continued)
Table 5-3. Peripheral Register Bit Reset Values
REG
BIT
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
TB0CN C/TB
—
—
TBCS TBCR
TBPS (3 bits)
TFB
EXFB TBOE DCEN EXENB TRB
ETB
CP/
RLB
TB0V
TB0V (16 bits)
TB1CN C/TB
—
—
TBCS TBCR
TBPS (3 bits)
TFB
EXFB TBOE DCEN EXENB TRB
ETB
CP/
RLB
TB1V
TB1V (16 bits)
TB2CN C/TB
—
—
TBCS TBCR
TBPS (3 bits)
TFB
EXFB TBOE DCEN EXENB TRB
ETB
CP/
RLB
TB2V
TB2V (16 bits)
ADCN
—
—
—
—
ADINT (2 bits)
ADCLK
(2 bits)
IREF
EN
AD
CONT
AD
DAIE
AD
PMO
ADACQ (4 bits)
ADDATA
ADDATA (16 bits)
REG
BIT
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PO0
1
1
1
1
1
1
1
1
PO1
1
1
1
1
1
1
1
1
PO2
1
1
1
1
1
1
1
1
PO3
1
1
1
1
1
1
1
1
EIF0
0
0
0
0
0
0
0
0
EIE0
0
0
0
0
0
0
0
0
PI0
s
s
s
s
s
s
s
s
PI1
s
s
s
s
s
s
s
s
PI2
s
s
s
s
s
s
s
s
PI3
s
s
s
s
s
s
s
s
EIES0
0
0
0
0
0
0
0
0
PWCN
0
0
0
0
0
0
0
0
0
0
0
0
s
s
0
0
PD0
0
0
0
0
0
0
0
0
PD1
0
0
0
0
0
0
0
0
PD2
0
0
0
0
0
0
0
0
PD3
0
0
0
0
0
0
0
0
RTRM
0
0
0
0
0
0
0
0
RCNT
0
0
0
0
0
0
0
0
0
0
0
0
s
0
0
s
RTSS
s
s
s
s
s
s
s
s
RTSH
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
RTSL
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
RSSA
0
0
0
0
0
0
0
0
RASH
0
0
0
0
0
0
0
0
RASL
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PO4
1
1
1
1
1
1
1
1
PO5
1
1
1
1
1
1
1
1
PO6
1
1
1
1
1
1
1
1