Dram frequency/timing configuration – Avalue ECM-VX900 User Manual

Page 62

Advertising
background image

ECM-VX900

62 ECM-VX900 User

’s Manual

3.6.6.1.1 DRAM Frequency/Timing configuration

Item

Option

Description

DRAM Clock

Auto

400MHz
533MHz

DRAM Clock selection

Bank Interleave

SPD

Non-page

2-way
4-way
8-way

Bank Interleave selection

Output Impedance Control

Normal

Weak

Output Impedance Control
selection

DDR2 Memory Chip ODT

[DDR2/DDR3]

Auto

Disabled

75 ohm/60 ohm

150 ohm/120 ohm

50 ohm/40 ohm

NA/20 ohm
NA/30 ohm

DDR2 Memory Chip ODT
[DDR2/DDR3] selection

DDR3 Dynamic ODT

Auto

Disabled

RZQ/4
RZQ/2

DDR3 Dynamic ODT selection

BA0 SEL

A11
A13
A15
A17
A19

BA0 SEL selection

Advertising