Cabling – Measurement Computing PCI-DAS1602/12 User Manual

Page 14

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PCI-DAS1602/12 User's Guide

Installing the PCI-DAS1602/12

13

16-channel single-ended mode pin out

Signal Name

Pin

Pin

Signal Name

GND

100

■

■

50

GND

EXTERNAL INTERRUPT

99

■

■

49

SSH OUT

n/c

98

■

■

48

PC +5 V

EXTERNAL D/A PACER GATE

97

■

■

47

n/c

D/A INTERNAL PACER OUTPUT

96

■

■

46

n/c

A/D INTERNAL PACER OUTPUT

95

■

■

45

A/D EXTERNAL TRIGGER IN

n/c

94

■

■

44

D/A EXTERNAL PACER IN

n/c

93

■

■

43

ANALOG TRIGGER IN

-12 V

92

■

■

42

A/D EXTERNAL PACER

GND

91

■

■

41

CTR 4 OUT

+12 V

90

■

■

40

CTR 4 GATE

GND

89

■

■

39

CTR 4 CLK

n/c

88

■

■

38

D/A OUT 1

n/c

87

■

■

37

D/A GND 1

n/c

86

■

■

36

D/A OUT 0

n/c

85

■

■

35

D/A GND 0

n/c

84

■

■

34

n/c

n/c

83

■

■

33

n/c

n/c

82

■

■

32

n/c

n/c

81

■

■

31

n/c

n/c

80

■

■

30

n/c

n/c

79

■

■

29

n/c

n/c

78

■

■

28

n/c

n/c

77

■

■

27

n/c

n/c

76

■

■

26

n/c

n/c

75

■

■

25

n/c

FIRSTPORTC Bit 7

74

■

■

24

n/c

FIRSTPORTC Bit 6

73

■

■

23

n/c

FIRSTPORTC Bit 5

72

■

■

22

n/c

FIRSTPORTC Bit 4

71

■

■

21

n/c

FIRSTPORTC Bit 3

70

■

■

20

n/c

FIRSTPORTC Bit 2

69

■

■

19

n/c

FIRSTPORTC Bit 1

68

■

■

18

LLGND

FIRSTPORTC Bit 0

67

■

■

17

CH15 HI

FIRSTPORTB Bit 7

66

■

■

16

CH7 HI

FIRSTPORTB Bit 6

65

■

■

15

CH14 HI

FIRSTPORTB Bit 5

64

■

■

14

CH6 HI

FIRSTPORTB Bit 4

63

■

■

13

CH13 HI

FIRSTPORTB Bit 3

62

■

■

12

CH5 HI

FIRSTPORTB Bit 2

61

■

■

11

CH12 HI

FIRSTPORTB Bit 1

60

■

■

10

CH4 HI

FIRSTPORTB Bit 0

59

■

■

9

CH11 HI

FIRSTPORTA Bit 7

58

■

■

8

CH3 HI

FIRSTPORTA Bit 6

57

■

■

7

CH10 HI

FIRSTPORTA Bit 5

56

■

■

6

CH2 HI

FIRSTPORTA Bit 4

55

■

■

5

CH9 HI

FIRSTPORTA Bit 3

54

■

■

4

CH1 HI

FIRSTPORTA Bit 2

53

■

■

3

CH8 HI

FIRSTPORTA Bit 1

52

■

■

2

CH0 HI

FIRSTPORTA Bit 0

51

■

■

1

LLGND

PCI slot

↓

The signal names for pins 2 to 17 define the functions for both single-ended modes and also for differential
input modes. For example, if you are using eight differential inputs, pin 2 is the high side of channel 0
(CH0 HI) and pin 3 is the low side (CH0 LO) of channel 0. If you are using single-ended inputs, pin 2 is
channel 0 (CH0 HI), but pin 3 is now channel 8 (CH8 HI). When you use single-ended inputs, use LLGND
(and not GND) for analog signal returns.

Cabling

You can use a C100FF-x cable to connect signals to the PCI-DAS1602/12 board. The C100FF-x cable is made
up of two 50-pin ribbon cables that are joined at one end with a 100-pin connector. The two 50-pin cables
diverge and are terminated at the other end with standard 50-pin header connectors.

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