Epson S1C6200 User Manual
Page 28
22
EPSON
S1C6200/6200A CORE CPU MANUAL
3 INSTRUCTION SET
B
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
A
1
1
1
1
1
1
1
1
1
1
1
1
0
1
0
1
1
1
1
0
1
1
1
1
1
1
0
1
1
0
9
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
0
1
8
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
1
1
1
0
1
1
1
1
1
1
0
1
1
0
7
0
1
1
1
1
1
1
1
1
0
0
1
e7
1
1
1
0
0
0
1
0
0
0
0
0
1
1
0
0
1
6
1
1
1
1
1
1
1
1
1
1
1
1
e6
1
1
0
1
1
1
0
1
0
0
1
1
1
0
1
0
1
5
0
0
0
0
0
0
0
0
0
0
0
0
e5
0
1
0
0
0
r1
1
0
1
1
0
0
1
1
0
r1
1
4
p4
0
0
0
0
0
0
0
0
1
1
1
e4
1
1
0
1
1
r0
1
0
1
1
0
0
1
0
0
r0
0
3
p3
1
0
0
0
0
1
1
0
1
1
1
e3
1
r1
1
i3
1
i3
r1
0
1
1
0
i3
1
r1
0
i3
r1
2
p2
0
0
1
1
1
0
0
1
1
0
1
e2
1
r0
1
i2
1
i2
r0
0
0
1
1
i2
0
r0
0
i2
r0
1
p1
1
r1
0
1
0
0
0
1
1
1
1
e1
1
r1
r1
i1
0
i1
q1
0
r1
r1
0
i1
0
q1
1
i1
q1
0
p0
0
r0
1
0
0
0
1
1
0
1
1
e0
0
r0
r0
i0
1
i0
q0
1
r0
r0
0
i0
1
q0
0
i0
q0
p
F
r
XH
XL
XP
YH
YL
YP
e
r
r
F, i
r, i
r, q
MX, r
MY, r
F, i
r, q
r, i
r, q
PSET
PUSH
RCF
RDF
RET
RETD
RETS
RLC
RRC
RST
RZF
SBC
SCF
SCPX
SCPY
SDF
SET
SLP
SUB
SZF
XOR
I D Z C
↑
↑
↓
↓
↑
↑
↑
↑
↑
↑
↑
↑
↑
5
5
5
5
5
5
5
5
5
7
7
7
12
12
7
5
7
7
7
7
7
7
7
7
7
5
7
7
7
7
NBP
←
p4, NPP
←
p3~p0
SP
←
SP-1, M(SP)
←
F
SP
←
SP-1, M(SP)
←
r
SP
←
SP-1, M(SP)
←
XH
SP
←
SP-1, M(SP)
←
XL
SP
←
SP-1, M(SP)
←
XP
SP
←
SP-1, M(SP)
←
YH
SP
←
SP-1, M(SP)
←
YL
SP
←
SP-1, M(SP)
←
YP
C
←
0
D
←
0 (Decimal Adjuster OFF)
PCSL
←
M(SP), PCSH
←
M(SP+1), PCP
←
M(SP+2)
SP
←
SP+3
PCSL
←
M(SP), PCSH
←
M(SP+1), PCP
←
M(SP+2)
SP
←
SP+3, M(X)
←
e3~e0, M(X+1)
←
e7~e4, X
←
X+2
PCSL
←
M(SP), PCSH
←
M(SP+1), PCP
←
M(SP+2)
SP
←
SP+3, PC
←
PC+1
d3
←
d2, d2
←
d1, d1
←
d0, d0
←
C, C
←
d3
d3
←
C, d2
←
d3, d1
←
d2, d0
←
d1, C
←
d0
F
←
F
Λ
i3~i0
Z
←
0
r
←
r-i3~i0-C
r
←
r-q-C
C
←
1
M(X)
←
M(X)-r-C, X
←
X+1
M(Y)
←
M(Y)-r-C, Y
←
Y+1
D
←
1 (Decimal Adjuster ON)
F
←
F
V
i3~i0
SLEEP (stop oscillation)
r
←
r-q
Z
←
1
r
←
r
∀
i3~i0
r
←
r
∀
q
↓
↓
↓
↓
↓
↓
↓
↓
↓
67
68
68
69
69
70
70
71
71
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72
73
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74
74
75
75
76
76
77
77
78
78
79
79
80
80
81
81
82
Page
Operand
Clock
Operation Code
Flag
Mne-
monic
Operation
↓
↑
↑
↓
↑
↑
↑
↑
↑
↑
↑
↓
↓
↓
↓
↓
↓
↓
↓
↓
★
★
★
★
↑
↑
★
↓
↑